DE2 JTAG_UART terminal_PC communication problem : pausing target proccessor

[Altera_Forum]

Hi, 

 I am doing the tutorial creating hello_world for a nios Development Board (niosII Sftw. Developers Handbook - Chap3 Getting started from de command line)  Tools 9.1 : nios II EDS -> command shell Board : Kit DE2 - EP2C35F672C6N ( Swith RUN position) Connection : USB- Blaster  I have do the tutorial with the nios2 commands  tutorial on ../nios2eds/examples/verilog/nikosII_cycloneII-2c35/standard/software_examples/app/hello_world  open first command-shell  ./create-this-app  nios2-configure-sof open second command-shell  nios2-terminal -> DE2 Load blue led on  When i download and run hello_world.elf on nios2 sopc  nios2-download -g hello_world.elf  The stream Hello World dont transmitted to terminal and  THE ERROR MESSAGE IS  Using cable "USB-Blaster [USB-0]", device 1, instance 0x00 pausing target processor: not responding. Resetting and trying again: FAILED Leaving target processor paused  I have a node jtag debug and jtag-UART  $jtagconfig -n 1) USB-Blaster [USB-0]  020B40DD EP2C35  Node 19104600  Node 0C006E00   -I have on forum that there is not problem with version > 7.1  THANKS IN ADVANCE

[Altera_Forum]

Do you have a Nios license or are you using it in evaluation mode? If your case is the second one, you must not close the message box which appears upon configuring fpga , otherwise all non licensed modules would be disabled and you obtain the error you see. 

If this is not the case, then you may have some problem with Nios itself or with jtag interface: check any warning message in sopc builder and/or Quartus (i.e. timings not met)  Regards

[Altera_Forum]

Hi, 

 I have EMBEDDED-IPS license.  I have do the next steps: 1- QII->SOPC builder  2-QII->compile 3- ../examples/bsp/hal_default/create-this-bsp 4../examples/app/hello_world/rm Makefile 5../examples/app/hello_word/create-this-app 6 ../standard/nios2-configure-sof --> message  ********************************************* Searching for SOF file: in .  NiosII_cycloneII_2c35_standard.sof  Info: ******************************************************************* Info: Running Quartus II Programmer Info: Command: quartus_pgm --no_banner --mode=jtag -o p;NiosII_cycloneII_2c35_standard.sof Info: Using programming cable "USB-Blaster [USB-0]" Info: Started Programmer operation at Tue May 25 15:30:55 2010 Info: Configuring device index 1 Info: Device 1 contains JTAG ID code 0x020B40DD Info: Configuration succeeded -- 1 device(s) configured Info: Successfully performed operation(s) Info: Ended Programmer operation at Tue May 25 15:30:57 2010 Info: Quartus II Programmer was successful. 0 errors, 0 warnings  Info: Peak virtual memory: 62 megabytes  Info: Processing ended: Tue May 25 15:30:58 2010  Info: Elapsed time: 00:00:04  Info: Total CPU time (on all processors): 00:00:01 *********************************************************  i dont close the command shell 7..open new command-shell ->$nios2-terminal 8../standard/software-examples/app/hello_world 9../_____________________________________/nios2-download -g hello_world.elf   and the ERROR CONTINUE

[Altera_Forum]

Hi, 

 I have tried run hello_world with the graphics environment of BST Tool eclipse.  When i execute the last step "Run As -> Nios hardware" there is a error message about target connection:  [Target Connection]: Actual system ID not found on target at base address  If i run configuration the information about system ID and timestamp is  Base address: 0x21208b8 ID:0c7f3727ef Timestamp: 1274776738  JTAG Debugging Information File name: *.jdi  System ID Properties  actual system id : n/a  actual system timestamp :n//a    There is some problem between QII 9.1sp1 web edition, Nios EDS 9.1 , and the version of example hello_world?  I have a license file for IPS_EMBEDDED that i can set by the QII options , it is need do set also with EDS Nios tool?  Thanks in advance

[Altera_Forum]

--- Quote Start ---   There is some problem between QII 9.1sp1 web edition, Nios EDS 9.1 , and the version of example hello_world?    --- Quote End ---    The version of example is not relevant. It's rather due to the syslib project. Probably there is some mismatch between the programmed sopc and the one define in syslib. Did you generate the nios system with sopc builder? I'd perform again these steps: - open sopc builder and make sure the system ID peripheral has been included - regenerate the sopc system - update the nios system in Quartus and recompile - create a new Nios IDE project and the associated syslib and build them

[Altera_Forum]

Hi, 

 I have rebuild all and the result dont change.  0-Copy in new work file the nios2eds example project: C:/altera/91/nios2eds/example/verilog/nios2_cyclone II_2c35/standard/* 1-Open QII (9.1 sp1 web edition ips-embedded license)-> open NiosII_cycloneII_2c35_standard project -> SOPC Builder ->automate base-address ->generate project :  -warning : using ddr_sdram_0 module version 9.11 and not 9.1  - i can read at sysid module/ the id system and timestamp  - sopcinfo file generated 2-Compile QII project   - *.sof generated  -DE2 cyclone II 2c35 FPGA configure : download *.sof  3-Open nios2 EDS BTS  - Workspace : same that QII project  - New File : nios2 application and BSP template  - Location SOPC : same that QII project  - hardware : nios2_cycloneII_2c35_sopc.sopcinfo   - Project name: hello_world  - ../software/hello_world and ../software/hello_world_bsp created  -build hello_world_bsp project  -build hello_world project  - i can real in public.mk file the id system and timestamp paremeters  - i dont understand WHAT IS syslib (¿old IDE file version?)  - hello_world RUN AS nios hardware 4-Error: sys id not found at base address  ¿ there is some other file from original example that is not upgrade when i build sopc, compile qII project and create hello_world software and bsp? Then makefile and socpinfo are ID matched, why can not execute the download-nios2 *.elf command? I have tried look for other example with sysid peripheral but i dont get it  Thanks

[Altera_Forum]

At first glance the steps you performed are correct 

   --- Quote Start ---    - i can read at sysid module/ the id system and timestamp    --- Quote End ---    I'm not sure what you mean. I suppose this means that you have verified that a sysid module has actually been inserted in sopc You can try to build the system WITHOUT the sysid module, so you can discriminate between a simple sysid identification problem or a more general system failure    --- Quote Start ---    - i dont understand WHAT IS syslib (¿old IDE file   --- Quote End ---   This is what you call hello_world_bsp. So this part is ok

[Altera_Forum]

I have do the next tests: 

 1- nios2eds-example-verilog-standard-2c35 fpga-hello_world template WITHOUT sysid: id error 2- same tutorial other templates: board_diagnostic template:Actual system ID not found on target at base address  3- other tutorial: hardware_development/count_binary: NO error  the las tutorial has different hardware system, this tutorial you can do from scratch.  I dont know a new strategy for debug hardware/software nios examples ¿Some ideas?  Thanks