Disable FPU on Arria10 SoC FPGA

[Altera_Forum]

Hi Support, 

 We need to disable FPU on Arria 10 SoC FPGA.  Please let us know the procedure how to disable FPU.    Regards, Karthik.

[Altera_Forum]

Karthik, 

all you need to do is to clear bit# 30 of the FPEXC register:  fmrx r0, FPEXC  bic r0, r0,# 0x40000000  fmxr FPEXC, r0

[Altera_Forum]

--- Quote Start ---  Karthik, all you need to do is to clear bit# 30 of the FPEXC register:  fmrx r0, FPEXC  bic r0, r0,# 0x40000000  fmxr FPEXC, r0  --- Quote End ---     Hi,  I ran the above assembly code(assembler) and generated binary from object file, when i try to execute binary it shows segmentation fault.  please let me know how to check FPU is disabled/not after running the assembly code.

[Altera_Forum]

If it traps accessing the FPEXC register, it is likely because the processor is running in user mode. 

FPEXC can only be accessed in privilege mode.  http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0068b/bcfhhbdd.html  Regards

[Altera_Forum]

--- Quote Start ---  If it traps accessing the FPEXC register, it is likely because the processor is running in user mode. FPEXC can only be accessed in privilege mode.  http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0068b/bcfhhbdd.html  Regards  --- Quote End ---    Thanks ericv. I will try it in privilege mode.

[Altera_Forum]

I'm not sure about that one: 

You could also hit another roadblock if the library was built for EABI hard-float. EABI hard-float means float/double arguments for functions are typically passed in the FPU registers instead of the R0->R12 basic set. As the FPU is disabled, if my understanding is correct, and if your library is hard-float, you will get traps. Regards

[Altera_Forum]

This will be work: 

fmrx r0, FPEXC bic r0, r0,# 0x40000000 fmxr FPEXC, r0