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Greetings all,
I have added links below for a couple things; first, a diff patch to the uclinux 2.6.11 kernel that allows you to use the EPCS configuration device for filesystems. Second, if you just want the complete kernel tree with the patch included, I gave the link for that. Lastly, there is a document I wrote that simply describes how to use the EPCS device to it's fullest extent. It's not advanced information, but it's good to know anyway... All of these can be directly downloaded, or checked out using SVN: diff patch: http://via.dynalias.org/svn/uclinux/patches/epcs_mtd/trunk/ (http://via.dynalias.org/svn/uclinux/patches/epcs_mtd/trunk/) uclinux 2.6.11 tree: http://via.dynalias.org/svn/uclinux/linux-2.6.11/trunk/ (http://via.dynalias.org/svn/uclinux/linux-2.6.11/trunk/) epcs document: http://via.dynalias.org/svn/uclinux/doc/trunk/epcs-ug.pdf (http://via.dynalias.org/svn/uclinux/doc/trunk/epcs-ug.pdf) Note: the driver has been tested by me, but it could definitely use some additional testing. Feel free to post feedback here..Link kopiert
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Hi J,
Awesome. The svn site is great too.- Als neu kennzeichnen
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Hi Jdhar,
I have verified the epcs mtd driver on 2.6.15.4 kernel. I wonder if the epcs register base is (na_epcs_controller + 0x200) ? The epcs doc is very nice. Cheer!- Als neu kennzeichnen
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Excellent, thanks a lot hippo. Did you only test if the driver compiles in successfully, or did you actually try it out with a config chip? If so, what chip... i'm trying to get this tested with as many EPCS devices as possible, and I only have access to 2 of them.
I too wondered about the epcs_controller address; mine is epcs_base + 0x200, but I don't know if this is the case for all EPCS chips. If it is, it may be possible to get the base address from 'make hwselect' and then remove the kernel configuration parameter. This would be a bit nicer of course. I am thinking about migrating to 2.6.15 now... are there any notable advantages that you know of over .11? Also, this is up to you of course, but since you have such a good guide going already in another thread, it may be helpful to link to this thread in your EPCS section since this probably deals with it in more detail. It would be nice to have as much relevant uClinux info in that one thread as possible, so it's easy to find.- Als neu kennzeichnen
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I have tested mounting a jffs2 on a EPCS64, and read/write on it.
The SOPC builder allocated 0x800 bytes of io port for epcs controller. The first 0x200 was the loader code, so it is reasonable to have the register base followed immediately. I will add the mtd driver in next kernel update. I will add jffs2 on epcs mtd to the guide. It will include the pci driver too. The next kernel should be 2.6.15.6 . Some of the internal data structure and api changed for newer kernel. So old drivers may be borken on new kernel. But there are a lot of bug fix and new drivers. You can find the long list of them on the kernel.org. I would recommand working on new kernel if you will use or write new drivers. It is impratical to back porting them to old kernels. I didn't have dev boards to test the new kernels until recently. So some of the net and usb driver files are missing in preivous 2.5.16.4 patches. Now those are fixed mostly.- Als neu kennzeichnen
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I will look into using the new kernel. Unless they changed the MTD layer, the EPCS Driver shouldn't be broken since it's relatively simple. I will work on getting .15 up in my environment, and then eventually move to .16.
If you got a working PCI Driver, that would be great. I have a few custom boards with miniPCI Bus on them, so I could easily test them out. One thing that is currently missing from my driver is write-verification. When it writes, it doesn't read back to check if it's correct. Is write-verification typically done in low-level drivers? It would make sense ,but given the low-speed of SPI Flash devices, I'm not sure whether I should implement it or not. Also, if you are going to include the EPCS MTD driver in the next kernel build, how should I keep it updated? Do I just send you patches? I was thinking of implementing an SD/MMC MTD Driver in SPI Mode since it wouldn't be too difficult either. Let me know your thoughts on this.... or if I should try to go through the MMC Driver section instead.- Als neu kennzeichnen
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Hi, J,
Please check post#52 in the buildroot guide. There is the pci driver in kernel 2.6.15.6 . For SD/MMC based on spi, I think it would be better to use MMC instead of MTD. The MMC driver has the higher level block devices drivers.- Als neu kennzeichnen
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Hello...
Just wanted to raise the awareness of the "virtual memory" EPCS peripheral (http://www.fpga.nl/index.html?ipcores.html). It doesn't look like it's been updated in a while, but it should provide a cleaner interface to everyone interested in using an EPCS and/or serial (SPI) flash device. This is also mentioned on the "Post Your IP" section of this forum. In fact, I think it was one of the first to be posted... Best Regards, - slacker- Als neu kennzeichnen
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--- Quote Start --- originally posted by slacker@Mar 16 2006, 06:56 PM hello...
just wanted to raise the awareness of the "virtual memory" epcs peripheral (http://www.fpga.nl/index.html?ipcores.html).
it doesn't look like it's been updated in a while, but it should provide a cleaner interface to everyone interested in using an epcs and/or serial (spi) flash device.
this is also mentioned on the "post your ip" section of this forum. in fact, i think it was one of the first to be posted...
best regards,
- slacker
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--- quote end ---
--- Quote End --- Not to knock someone elses work, but I don't see how that interface is cleaner... 1) This driver doesn't require a special core, it uses Alteras EPCS core, 2) This other core won't let you use the Altera tools to bootload the FPGA, and 3) It won't let you use Altera tools to directly access the EPCS device, which is a big advantage. Also, it requires the clock to the core to be less than 20M... this wouldn't be that hard to change however.. JFFS2 and MTD Drivers are specifically optimized for Flash devices such as the EPCS device; it caches the writes so that it optimizes erase cycles. This would be more difficult to do with this other core I believe.
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Yes, I agree with you, for uCLinux. I hadn't noticed that this was posted to the uCLinux Forum....don't ask me why.
Cheers, - slacker
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