Fail to restart program after poweroff and poweron

[Altera_Forum]

Best wishes and happy new year for all!! 

  I have a problem on rebooting my project. The program runs ok when flashed on my nios ii system board (is a custom board consist of an cyclone ii fpga, sdram, epcs flash device and an lcd), but when I power off and then power on the board the program does not start any more! I use an EPCS4 4Mbit flash connected to my NIOS II.  On SOPC builder I put 0x0 as starting address of my EPCS4 flash device connected and the reset vector on cpu also to starts on 0x0 and the exception vector is on sdram with offset 0x20.  I flashed the system and the program (sof and elf files) using flash programmer from Eclipse Ganymede menu! I do not know if that is enough or have to do more actions? Do I have to add more files? (.pof for example)? Can you please help ?  Thanks in advance!

[Altera_Forum]

You're first step is to verify that the FPGA is indeed getting programmed. Once you determine that to be true, you can move on to finding out if something is wrong on the software side of things. 

 Is the FPGA getting programmed?  Jake

[Altera_Forum]

Thank you for your reply!  

Iwould like to find out if the fpga is getting programmed ob power on but I do not know how to do! Any sugestions?

[Altera_Forum]

One simple way for you would be to cycle power on the board, then try and download and run your software on the NIOS. If the NIOS isn't there (because the FPGA never got configured), then you'll get an error message indicating that no NIOS processors were detected. 

 Jake

[Altera_Forum]

If I cycle power on the board I must use Quartus II Programmer to flash .sof file. But as soon as programmer finishes the software starts run immediately !!

[Altera_Forum]

Well it sounds like your software is loaded into the flash but either: 

 1 - The FPGA programming file is not programmed into the flash. 2 - Something is failing in the configuration.  Are the MSEL pins on the FPGA correctly set for Active Serial Programming? http://www.altera.com/literature/hb/cyc2/cyc2_cii51013.pdf  If you have an oscilloscope handy you might want to start probing the config pins to see what is happening there.  Jake

[Altera_Forum]

I expect case 1, because you mentioned to have only programmed a sof version of the FPGA configuaration. It's volatile. The configuration must go to the EPCS4 as well.

[Altera_Forum]

I think he's using the NIOS II flash programmer to program the EPCS device. You give it the SOF file and it does the conversion for you. 

 Jake

[Altera_Forum]

Thank you all for you participation! 

I used the nios ii console and tried to start the script generated by the nios flash programmer. After the script finished I see that the message in the last lines is that... ........ Device size is 512KByte <4Mbit> erase regions are: offset 0: 8 x 64K EPCS status is 0x00 Input file is too large to fit <device size =0x80000>   ----------------------------------------------- I suppose I must find a way to minimize my program... .. I enabled the small C library and started again the script but the result is the same!   Any suggestions?

[Altera_Forum]

Well it seems like we previously determined that your software program is indeed being programmed into the flash. Are you sure it's not claiming that the FPGA configuration file is too large rather than your software image? 

 It may be that you will only be able to fit your FPGA image into the EPCS4 device. And you may need to enable compression to accomplish this.  Jake

[Altera_Forum]

I followed the procedure and I have generated a compressed .pof file but the result is the same.  

 I am not sure if I do the procedure of flashing in the right way!  Is there any quick tutorial on flashing?   I have already ordered a bigger flash EPCS64 chip and I am waiting to arrive but till then I must be sure that I am not doing something wrong on the flashing procedure!

[Altera_Forum]

Doesn't the EPCS64 have a different footprint than the EPCS4? 

 Jake

[Altera_Forum]

Yes its a SOIC16 but is ok for the board.  

The curent chip is SOIC8.

[Altera_Forum]

but until the new flash chip arrives, I tried to put the hardware image only to flash using AS programming and now the board has the nios ii system present even power off and then on the board. 

Lets suppose that I want now to add the only software, is possible to add partially?

[Altera_Forum]

Finally I put an EPCS16. The problem insists!!!! I am doing something wrong!!! 

:(

[Altera_Forum]

Can you post any and all error messages you are receiving? 

 Jake

[Altera_Forum]

This is the script generated by Eclipse nios Flash programmer.  

If I launch it gives the following. Is the quartus_cpf --no_banner --convert --device=EPCS128....referred in the first lines ok ? I use an EPCS16 ? After the script finishes I press reset and programm is running ok. But if I cycle power not starts any more. I noticed also that after cycle power nios2 is absent!  Thank you for your time! /cygdrive/d/ep2c8/script [NiosII EDS]$ ./flash_programmer.sh Jan 19, 2010 1:47:29 AM - (FINE) sof2flash: Starting Info: ******************************************************************* Info: Running Quartus II Convert_programming_file Info: Command: quartus_cpf --no_banner --convert --device=EPCS128 --option=D:/ep 2c8/flash/2c8_TRH_epcs.opt D:/ep2c8/2c8_TRH.sof D:/ep2c8/flash/2c8_TRH_epcs.pof Info: Quartus II Convert_programming_file was successful. 0 errors, 0 warnings  Info: Peak virtual memory: 69 megabytes  Info: Processing ended: Tue Jan 19 01:47:31 2010  Info: Elapsed time: 00:00:01  Info: Total CPU time (on all processors): 00:00:01 Info: ******************************************************************* Info: Running Quartus II Convert_programming_file Info: Command: quartus_cpf --no_banner --convert D:/ep2c8/flash/2c8_TRH_epcs.pof  D:/ep2c8/flash/2c8_TRH_epcs.rpd Info: Quartus II Convert_programming_file was successful. 0 errors, 0 warnings  Info: Peak virtual memory: 68 megabytes  Info: Processing ended: Tue Jan 19 01:47:34 2010  Info: Elapsed time: 00:00:02  Info: Total CPU time (on all processors): 00:00:02 Jan 19, 2010 1:47:35 AM - (FINE) sof2flash: Done Using cable "USB-Blaster [USB-0]", device 1, instance 0x00 Resetting and pausing target processor: OK Reading System ID at address 0x00001898: verified Processor data bus width is 32 bits Looking for EPCS registers at address 0x00000000 (with 32bit alignment)  Initial values: 0001703A 04C00074 9801483A 9CFFF804 983FFD1E 0000203A  Not here: reserved fields are non-zero Looking for EPCS registers at address 0x00000100 (with 32bit alignment)  Initial values: 92400237 4A40100C 483FFD26 90000135 92400237 4A40200C  Not here: reserved fields are non-zero Looking for EPCS registers at address 0x00000200 (with 32bit alignment)  Initial values: 00000000 00000000 00000260 00000000 00000000 00000001  Valid registers found EPCS signature is 0x14 EPCS identifier is 0x202015 Using EPCS size information from section [EPCS-202015] Device size is 2MByte (16Mbit) Erase regions are:  offset 0: 32 x 64K EPCS status is 0x00  : Checksumming existing contents 00000000 : Verifying existing contents 00000000 : Needs erase then program 00010000 : Verifying existing contents 00010000 : Needs erase then program 00020000 : Verifying existing contents 00020000 : Needs erase then program 00000000 : Reading existing contents 00010000 : Reading existing contents 00020000 : Reading existing contents Checksummed/read 49kB in 1.1s 00000000 ( 0%): Erasing 00010000 (33%): Erasing 00020000 (66%): Erasing Erased 192kB in 1.9s (101.0kB/s) 00000000 ( 0%): Programming 00010000 (33%): Programming 00020000 (66%): Programming Programmed 144KB +48KB in 4.5s (42.6KB/s) Did not attempt to verify device contents Leaving target processor paused Jan 19, 2010 1:47:45 AM - (INFO) elf2flash: args = --input=D:/ep2c8/software/THP /THP.elf --output=D:/ep2c8/flash/THP_epcs.flash --epcs --after=D:/ep2c8/flash/2c 8_TRH_epcs.flash --verbose Jan 19, 2010 1:47:45 AM - (FINE) elf2flash: Starting Jan 19, 2010 1:47:45 AM - (FINER) elf2flash: Program Record: 71264 bytes destine d for 0x2000020 Jan 19, 2010 1:47:45 AM - (FINER) elf2flash: Start Record: 20001c4 Jan 19, 2010 1:47:45 AM - (FINE) elf2flash: Done Using cable "USB-Blaster [USB-0]", device 1, instance 0x00 Resetting and pausing target processor: OK Reading System ID at address 0x00001898: verified Processor data bus width is 32 bits Looking for EPCS registers at address 0x00000000 (with 32bit alignment)  Initial values: 0001703A 04C00074 9801483A 9CFFF804 983FFD1E 0000203A  Not here: reserved fields are non-zero Looking for EPCS registers at address 0x00000100 (with 32bit alignment)  Initial values: 92400237 4A40100C 483FFD26 90000135 92400237 4A40200C  Not here: reserved fields are non-zero Looking for EPCS registers at address 0x00000200 (with 32bit alignment)  Initial values: 00000000 00000000 00000260 00000000 00000000 00000001  Valid registers found EPCS signature is 0x14 EPCS identifier is 0x202015 Using EPCS size information from section [EPCS-202015] Device size is 2MByte (16Mbit) Erase regions are:  offset 0: 32 x 64K EPCS status is 0x00  : Checksumming existing contents 00020000 : Verifying existing contents 00020000 : Needs erase then program 00030000 : Verifying existing contents 00030000 : Needs erase then program 00020000 : Reading existing contents 00030000 : Reading existing contents Checksummed/read 59kB in 1.5s 00020000 ( 0%): Erasing 00030000 (50%): Erasing Erased 128kB in 1.3s (98.4kB/s) 00020000 ( 0%): Programming 00030000 (50%): Programming Programmed 70KB +58KB in 2.0s (64.0KB/s) Did not attempt to verify device contents Leaving target processor paused /cygdrive/d/ep2c8/script

[Altera_Forum]

Unfortunately I see in the forum that other people had problems with epcs boot due to a Quartus ii 9.1 version. 

I searched altera's site but I did not found a patch that fixes the problem. I cannot find also the 9.0 version of quartus to reinstall. I tried to communicate with altera for support but I didnt find the way. I am doing cycles in the site. Anyway I am a student and I do my thesis on nios2. I am really very sorry because I cannot conclude!! I lost more than a month reading and searching for the boot problem. it took less time the nios development and the software than the boot! Maybe I am wrong but I think altera has not a good policy!!!!!!!!!!!!!!!!!!! They should have already issue free for public and easy to download the patch. I am really very sorry for all my lost time!!!!!

[Altera_Forum]

The patches are available by filing a service request on the Altera website: 

http://www.alteraforum.com/forum/showthread.php?t=20577&referrerid=2226  The 9.0 tools can be obtained here: https://www.altera.com/support/software/download/altera_design/quartus_archive/dnl-quartus_archive.jsp https://www.altera.com/servlets/download2?swcode=www-swd-nio2-90-all&referer=https://www.altera.com/support/software/download/nios2/dnl-nios2.jsp  I agree these bugs are unfortunate and also historically very unlike Altera.  Jake

[Altera_Forum]

--- Quote Start ---  I think he's using the NIOS II flash programmer to program the EPCS device. You give it the SOF file and it does the conversion for you.  Jake  --- Quote End ---    I think he's right.

[Altera_Forum]

A few days ago it was published by Altera the service pack for Quartus ii 9.1 web and Nios IDE! 

I installed it and everything works now ok!!