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Hi all,
Anyone used the Fast Input Register and Fast Output Register logic options in the Quartus II software before? I am not sure where to turn these options on as I found this information from the document SD ram controller core with NIOS II. It says By turning these two options on, the fitter places registers for the SDRAM signals in the I/O cells. Signals driven from registers in I/O cells have similar timingcharacteristics, such as tCO, tSU, and tH. Anyone can give me any pointer or details as to where to set it( I can't find it in the assignment editor which is indicated in the Quartus help ). Thank you very much in advance, TonyLink Copied
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This is very easy to do.
open the top level of your design where the input output or bidir pins are. then right clic on on of these sysmbols to open the content menue and select LOCATE -> LOCATE IN ASSIGNMENT EDITOR if you do this with the SDRAM_A[....] for example .. inside the asssignment editor you can select the SDRAM_A as a complete bus without the need to edit each member of this bus. you will see SDRAM_A in red and in black. black means this option has already been assigned. select SDRAM_A in red an clic into the assignment name field. now just press a "f" and you will be pointed to "Fast input...." scroll down twice for fast output ... and hit enter now one field to the right and select "ON" now you should have a new line that SDRAM_A is a fast output register with option ON. That's it. Do this with all signals that need fast input output or enable (all SDRAM signals) It is realy very easy to do. Regards. Michael Schmitt- Mark as New
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Thanks so much

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