Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
12745 討論

HI, I'm facing an issue with FLASH programmer tool to generate and program the flash, getting error code : 3 - sof2flash --> ECB_CFI_flash.flash. Please insturct how to resolve it. Tnx, Avi

AReuv
初學者
1,998 檢視
 
0 積分
7 回應
Ahmed_H_Intel1
1,879 檢視

Hi,

I am sorry, the flash programmer is no longer supported. Please generate the .jic file to program the flash.

Please check the attached tutorial for how to generate a .jic file and how to program a flash device.

Regards,

 

Ahmed_H_Intel1
1,879 檢視

JIC flash programming procedure

AReuv
初學者
1,879 檢視

Hi,

OK thanks. another quick question, while I'm converting sof2flash it ask for start address, should I put the start address that the file should be in the flash or to put 0x0 as a default ?

I'm asking because I've also elf2flash as well and few more files to program in to flash.

Thanks a lot.

Avi

AReuv
初學者
1,879 檢視

Hi,

A continue to my question above about the base address while creating sof2flash or elf2 flash, I'm asking this because while programming the files with Nois2-flash-programmmer it also required the base address again.

Tnx,

Avi

AReuv
初學者
1,879 檢視

Hi,

Just to clarify, the FLASH I'm using is Parallel flash form Micron MT28EW connected directly to FPGA.

Avi

Ahmed_H_Intel1
1,879 檢視

Hi,

If you are using a parallel flash device it is simple. You need to create a PFL project (Parallel Flash Loader) to make the FPGA acts as a bridge between the computer and the flash device.

You can simply check the attached tutorial to create a PFL project.

Regards,

 

Ahmed_H_Intel1
1,879 檢視

Here is the tutorial of how to create a PFL project to program a parallel flash memory.

 

回覆