Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
12627 Discussions

HPS-FPGA Communication using mSGDMAs in memory-mapped mode

Honored Contributor II



I'm trying to write some data from HPS to an on-chip memory and to rewrite them in a memory in HPS (from the on-chip memory). 

I'm using a SoCKit board. 

As a first step, in both cases, I'm using a mSGDMA (in memory-mapped to memory-mapped mode) for each direction, in order to read data from HPS and to write them to FPGA, and to read data from FPGA and to write them to HPS. In addiction, I'm not considering the use of any further processor (as Nios II). 

Unfortunately, I didn't find any C code to use as a reference. 

To understand the flow and how I should write the related C code, I started by the code provided at this link (, where a streaming to memory-mapped mode (and vice versa) is considered for the mSGDMA. 

But I didn't understand which addresses I should consider to read/write the CSR and descriptor register (some address is missed). 


Could you suggest to me any reference code to read/write using mSGDMA or what addresses should be : ALT_LWFPGASLVS_OFST, READ_MSGDMA_DISP_CSR_BASE, WRITE_MSGDMA_DISP_CSR_BASE, MEMTEST_MEMTEST_CONTROLLER_BASE?  


Thank you in advance!
0 Kudos
1 Reply
Honored Contributor II
0 Kudos