Nios® V/II Embedded Design Suite (EDS)
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Hello, I have a doubt that is it possible for simultaneously sampling running 8 SPI masters using SPI core and NIOS II processor.


I'm using DE0 Nano board for receiving data from 8 ADC's simultaneously and then sending the entire data to a DSP Board. The ADC uses SPI interface. Also the DSP board is connected using SPI.

Currently I have designed a custom SPI block in VHDL for interfacing multiple ADCs. But it would be alot easier if I can use platform designer to achieve the same.


I need all the SPI masters to collect data from the ADC simultaneously and any delay in sampling would result in wrong results.


Thanks alot in advance.


Om Kolhe

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Hi, Yes you can achieve this via platform designer. You can use the mSGDMA core to transfer data contentiously from the ADC. Here is an example I've created before for the DE0 Nano Soc board to transfer data from ADC to memory. In your case you need to use mm-to-st descriptor to achieve this.
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