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I am developing a project in which I need to connect a 16-bit bus to a NIOS processor, using a FIFO, I used "on chip FIFO", but do not know how to configure it to be able to have the input of FIFO in the schematic generated by SOPC.
:( Would be very grateful if you could give me an example of the connection of the FIFO.Link Copied
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You need to export the slave interface of the fifo output port.
This can be easily done using the external master component that I posted in this thread: http://www.alteraforum.com/forum/showthread.php?t=37585
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