How to use the Watchdog Timer?

Altera_Forum · ‎04-19-2006

Ok, I've added a stock Watchdog timer to my SOPC System with NiosII (5.1sp1)

I've loaded my hardware and firmware into flash and it all sucessfully boots and runs on powerup. My Reset Address points to EPCS Controller and everything else is out of SDRAM.

Like I said, boots and runs fine ouf of serial flash.

So why when I let my Watchdog times out it seems to reset, but why doesn't it reboot out of flash?

Are there any other steps not in the docs I should take?

Thanks,

Ken

Altera_Forum · ‎04-20-2006

Ken,

I don't know anything about your system, but if the EPCS is the only configuration device you have, then you'd need to connect a PIO to the nConfig pin on your FPGA. Pulsing this low should trigger a reconfiguration.

If you're using one of Altera's boards, most of them use a Max PLD to handle the power-up configuration and reconfiguration requests. For the boards that contain EPCS devices, the PLD logic checks for the existence of a hardware image in the EPCS and steps aside if it's there. If it doesn't find one, the PLD loads the FPGA image from CFI.

Cheers,

- slacker

Altera_Forum · ‎04-20-2006

Thanks Slacker,

I'll do that, but why is the Watchdog Timer not functioning as advertised?

(rhetorical question)

Since it is a black box, I would expect the Nios group to test it and make sure it works in a reliable and useful way.

Once you add a timeout pulse to the Watchdog Timer it converts to "Custom". So again, what is the expected functionality of the Watchdog Timer?

Ken