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I can't make " New-Nios II Application and BSP from template".

Altera_Forum
Honored Contributor II
4,626 Views

Hi,all. 

 

I tried to make " New-Nios II Application and BSP from template", but I can't make it. 

I selected the ".sopcinfo file", and typed "Project name", and choose "Blank Project" at the project template, I click "Finish" at the last. 

As soon as I clicked , Creating Project begin , but 10 seconds later "Error Creating Project" window appears. 

The error message is "Failed to execute: ./create-this-bsp --cpu-name cpu --no-make". 

 

Do you know how to solve this probrem?
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12 Replies
Altera_Forum
Honored Contributor II
2,176 Views

Did you run NIOS SBT as Administrator?

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Altera_Forum
Honored Contributor II
2,176 Views

I didn't care about it. 

Then, I did it as Administrator. 

But same result happens... 

 

Below ERROR message is In the console window . 

 

"SEVERE: [Error] altera_hal_linkerx_generator: Required linker section mappings do not exist: "[.entry, .exceptions, .rodata, .rwdata, .text, .bss, .heap, .stack]"  

 

Does my process have any problems?
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Altera_Forum
Honored Contributor II
2,176 Views

The essential is a cpu, jtag, memory to initialize the processor and sysid.. and clock  

 

I don't know this specific error :(
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Altera_Forum
Honored Contributor II
2,176 Views

Looks like you haven't filled in the options to tell the sopc builder/qsys which memory areas are connected, and what is to be used for what. 

 

Might even be that you also haven't connected the cpu's instruction and data master ports to the relevant slaves.
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Altera_Forum
Honored Contributor II
2,176 Views

The same error,I did meet yet! 

The project being compiled in SOPC appeared this error in Eclipse with .sopcinfo,but the project being compiled in Qsys is successful in Eclipse with sopcinfo! 

Quartus 11.1 sp2!
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Altera_Forum
Honored Contributor II
2,176 Views

 

--- Quote Start ---  

The essential is a cpu, jtag, memory to initialize the processor and sysid.. and clock 

 

I don't know this specific error  

--- Quote End ---  

 

 

Thanks. 

The problem is unsolved although I have still challenged it.  

 

 

 

--- Quote Start ---  

Looks like you haven't filled in the options to tell the sopc builder/qsys which memory areas are connected, and what is to be used for what. 

 

Might even be that you also haven't connected the cpu's instruction and data master ports to the relevant slaves. 

--- Quote End ---  

 

 

Thanks. 

Although I checked those connection, they're connected certainly. 

 

 

--- Quote Start ---  

The same error,I did meet yet! 

The project being compiled in SOPC appeared this error in Eclipse with .sopcinfo,but the project being compiled in Qsys is successful in Eclipse with sopcinfo! 

Quartus 11.1 sp2! 

--- Quote End ---  

 

 

Thanks. 

My Quartus ver is 11.1-SP2 too. 

And I made this design(.sopcinfo) by Qsys , so I don't know why my design is error.
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Altera_Forum
Honored Contributor II
2,176 Views

Yes, also working on Windows 7 64bit : 

If you don't see a NiosII menu item on Eclipse, 

or File => Run -> Nios II C/C++ Application and BSP from Template 

Un-install all Altera packages, delete all Altera files, reboot, re-install NiosII with Eclipse. 

Then one should have the NiosII menu items, including "Nios II C/C++ Application and BSP from Template". 

If get a .bsp but no application : 

Run Eclipse in XP sp2 compatibility mode. I have administrator privileges. Say yes if get a run confirm window.  

Then run "Nios II C/C++ Application and BSP from Template". 

Should now run through OK.  

Build Application (right click). 

Use NiosII => Quartus II Programmer menu item to connect to hardware, upload .sof file. 

Run application as NioII Hardware, making sure you refresh the USB connection if needed (on extreme right of window if pops up). 

Should now all run. 

Best of luck.
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Altera_Forum
Honored Contributor II
2,176 Views

Hi, 

 

I know that your post is three years ago but I have encountered the same problem recently. I wonder if you have found a solution. If so can you share it here, please? 

 

Best Regards, 

Mustafa 

 

 

 

--- Quote Start ---  

Hi,all. 

 

I tried to make " New-Nios II Application and BSP from template", but I can't make it. 

I selected the ".sopcinfo file", and typed "Project name", and choose "Blank Project" at the project template, I click "Finish" at the last. 

As soon as I clicked , Creating Project begin , but 10 seconds later "Error Creating Project" window appears. 

The error message is "Failed to execute: ./create-this-bsp --cpu-name cpu --no-make". 

 

Do you know how to solve this probrem? 

--- Quote End ---  

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Altera_Forum
Honored Contributor II
2,176 Views

hi,FKDKNJ. 

Have you solved the problem? 

I used the command shell to create my sopc project, when typed in ./create-this-app ,  

an error appeared "Required linker section mappings do not exist: "[.entry, .exceptions, .rodata, .rwdata, .text, .bss, .heap, .stack]" 

Can you share you experience with us? Thank you very much.
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Altera_Forum
Honored Contributor II
2,176 Views

Hey guys! I'm trying to execute the memory test template. I select the option to test flash.  

I have checked in the system.h file that the name of the flash is /dev/ext_flash. But when I type in the same name in the nios console, it shows an error 

saying : could not open "/dev/ext_flash" 

 

any idea how to eliminate this?
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tms4517
Beginner
1,125 Views

I was following the "AN 717: Nios II Gen2 HardwareDevelopment Tutorial" and came across this error. `Failed to execute: ./create-this-bsp --cpu-name cpu --no-make`.

The issue came about because I hadn't completed step 9 of section 1.5.5.3. "9. Connect the s1 port of the on-chip memory to both the data_master port and instruction_master port of the Nios II processor."

 

I connected the ports, reassigned the base addresses, recompiled the design and when I created a New Nios II Application and BSP from Template the issue seems sorted.

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Kelvin_Thomas
Novice
717 Views

In my case, I'm still getting the error after reassigning the base addresses and recompiling the design.

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