IOWR and IORD Problem (with Image)

[Dolemy]

Hello!

I am having difficulty using the IOWR and IORD functions in NIOS II.

I have created a custom Uart Tx IP and I want to communicate with my computer through it. then, I have included it in NIOS II and then used Eclipse to store the desired characters in the Uart Tx IP base memory using the IOWR function.
However, I found that the memory address where I stored the value is not working properly and is showing strange values instead of the values I stored. I thought it was a garbage value and initialized it, but the problem still persists. When I changed the offset from 0 to 1, the value was stored correctly at that address. I want to store the desired value at the desired memory address using the IOWR function. Am I doing something wrong? Or do you need more information to solve this problem?

Please let me know if you need more information. Thank you.

 Debug (0x00011030 is my custom ip base address)

   MY C code

 

[EBERLAZARE_I_Intel]

Hi,

Can you share your .qsys for this? Also, which NIOS and Quartus version that you tested and build it on?

[Dolemy]

Thank you for your answering

I'm now using Quartus 13.0sp1 

beacuse this version is lastest version for cyclone ii 

Here is my .qsys file link

https://drive.google.com/file/d/1rXqLX3zLWwuXYfy9pXj1LXsEr_Ty_Mjt/view?usp=share_link

[EBERLAZARE_I_Intel]

Hi,

I see, I may need some time to get some info regarding the old 13.1 ver on if there are any known issues on the NIOS II with Cyclone II. Thanks.

[EBERLAZARE_I_Intel]

Hi,

This may take some time, I am still working on the issue.

[EBERLAZARE_I_Intel]

Hi,

Can you also provide the C code and your project file? I am trying to understand your C code flow.

[Dolemy]

Here is my C code.

//////////////////

#include "sys/alt_stdio.h"

#include <system.h>

#include <stdio.h>

#include <io.h>

#include <unistd.h>

/*void Uart_Tx(char ch)

{

IOWR(MY_UART_TX_0_BASE,0,0x41);

usleep(1000000);

printf("DATA: %c\n", IORD(MY_UART_TX_0_BASE,0));

}

*/

int main()

{ 

  alt_putstr("Hello from Nios II!\n");

  IOWR(MY_UART_TX_0_BASE,0,0xFF);

  /* Event loop never exits. */

  while (1){

  IOWR(MY_UART_TX_0_BASE,0,0x42);

  usleep(100000);

  printf("DATA: %c\n", IORD(MY_UART_TX_0_BASE,0));

  }

  return 0;

}

//////////////////

[EBERLAZARE_I_Intel]

Hi,

Thanks, let me get back to you.

[EBERLAZARE_I_Intel]

Hi,

Here is the description on the macros:

https://www.ecb.torontomu.ca/~courses/coe718/Data-Sheets/Nios-Lab/n2sw_nii5v2.pdf#page=113

IOWR(BASE, REGNUM, DATA), where REGNUM should be the offset address of BASE.

Are you facing any other issue?

[EBERLAZARE_I_Intel]

Hi,

Do you have any update?

[Dolemy]

Thank you.

I received your answer well.

Even after modifying the code according to your answer and debugging it, the same problem occurs.

I think the problem is that I made my CUSTOM IP incorrectly.

If it’s not too much trouble, could you tell me how to make a CUSTOM IP using the UART_TX HDL code I’m providing?

I will write my HDL code for this purpose. I will also attach other HDL codes I wrote to make it into CUSTOM IP below.

// UART_TX

/*

Baud Rate == 1152000, FPGA clock = 50Mhz

Clock per Byte(CPB) = 1152000/20ns = 434

*/

/////////////////////////////

module UART_TX(

input clk,reset_n ,

input [7:0] tx_din ,

input we ,

output done ,

output tx_dout  

);

parameter [3:0]

IDLE = 0,

START = 1,

DATA0 = 2,

DATA1 = 3,

DATA2 = 4,

DATA3 = 5,

DATA4 = 6,

DATA5 = 7,

DATA6 = 8,

DATA7 = 9,

STOP0 = 10,

STOP1 = 11;

localparam CPB = 434;

////// wire , reg declaration

reg [3:0] state,next_state ;

reg [9:0] cnt ;

reg dout_reg ;

wire [7:0] din_reg ;

assign din_reg = tx_din ;

//////////////////////////////////////

//state transition logic

always @(cnt,we) begin

next_state = IDLE;

case(state)

IDLE : next_state = (we & cnt == CPB - 1) ? START : IDLE;

START : next_state = (we & cnt == CPB - 1) ? DATA0 : START;

DATA0 : next_state = (we & cnt == CPB - 1) ? DATA1 : DATA0;

DATA1 : next_state = (we & cnt == CPB - 1) ? DATA2 : DATA1;

DATA2 : next_state = (we & cnt == CPB - 1) ? DATA3 : DATA2;

DATA3 : next_state = (we & cnt == CPB - 1) ? DATA4 : DATA3;

DATA4 : next_state = (we & cnt == CPB - 1) ? DATA5 : DATA4;

DATA5 : next_state = (we & cnt == CPB - 1) ? DATA6 : DATA5;

DATA6 : next_state = (we & cnt == CPB - 1) ? DATA7 : DATA6;

DATA7 : next_state = (we & cnt == CPB - 1) ? STOP0 : DATA7;

STOP0 : next_state = (we & cnt == CPB - 1) ? STOP1 : STOP0;

STOP1 : next_state = (we & cnt == CPB - 1) ? IDLE : STOP1;

endcase

end

//state sequantial logic

always @(posedge clk, negedge reset_n) begin

if(!reset_n) state <= IDLE;

else state <= next_state;

end

//i_clk counter

always @(posedge clk, negedge reset_n) begin

if(!reset_n) cnt <= 10'd0;

else begin

if(state != next_state) cnt <= 10'd0;

else cnt <= cnt + 10'd1;

end

end

//output logic

always @(*) begin

dout_reg = 1;

case(state)

IDLE : dout_reg = 1;

START : dout_reg = 0;

DATA0 : dout_reg = din_reg[0];

DATA1 : dout_reg = din_reg[1];

DATA2 : dout_reg = din_reg[2];

DATA3 : dout_reg = din_reg[3];

DATA4 : dout_reg = din_reg[4];

   DATA5 : dout_reg = din_reg[5];

   DATA6 : dout_reg = din_reg[6];

   DATA7 : dout_reg = din_reg[7];

   STOP0 : dout_reg = 1;

   STOP1 : dout_reg = 1;

endcase

end

assign tx_dout = dout_reg;

assign done = (state == STOP1);

endmodule

// HDL CODE FOR USING CUSTOM IP

module TX_IP(

input clk,reset_n,

output done,q_ex

);

    Qsys_default u0 (

        .clk_clk                           (clk),                           //                        clk.clk

        .reset_reset_n                     (reset_n),                     //                      reset.reset_n

        .tx_dout_qsys_0_conduit_end_export (q_ex), // tx_dout_qsys_0_conduit_end.export

        .done_0_conduit_end_1_export       (done)        //       done_0_conduit_end_1.export

    );

endmodule

////////////////////////////////////////////////////////////

  

Thank you again for your dedication. 

Thanks to this community, I was able to grow quickly

/////

[EBERLAZARE_I_Intel]

Hi,

Thanks for your feedback, for Custom IP creation, I am not familiar with it, could you create a new thread on Custom IP creation based on your request? A new expertise will assist you on that.

If there are no further related questions, we could close this thread and you can follow up in the new thread regarding the Custom IP.

[EBERLAZARE_I_Intel]

Hi,

Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.