Interface Issue between Nios(uClinux) & User logic

Altera_Forum · ‎05-26-2006

Hi,

My user logic is Simple Inverter.

The following C - code, which needs to have Read & write transaction with inveter is not Working. Means write is not properly happening.

main()

{

unsigned char *p,*u;

int a[100];

volatile int i,k=0,k1=0,k2=0;

p = 0x00800050;

k = k+1;

u = 0x00800054;

for ( i = 0; i < 100 ; i++ )

{

*p = i;

k++;k1++;k2++; // dummy statements

a = *u;

}

for ( i = 0; i < 100; i++ )

printf(" \n\t data_out: %d ", a);

}

Here P is the address for Write-port (Corresponding VHDL signal - din) , and

U is the address for read-port (Corresponding VHDL signal - dout)

But the following code works:

main()

{

unsigned char *p,*u;

int a[100];

volatile int i,k=0,k1=0,k2=0;

p = 0x00800050;

k = k+1;

u = 0x00800054;

for ( i = 0; i < 100 ; i++ )

{

*p = i;

k++;k1++;k2++; // dummy statements

a = *u;

<span style="color:red">printf(" \n\t data_out: %d ", a);

}

for ( i = 0; i < 100; i++ )

printf(" \n\t Data_out: %d ", a[i]);

}</span>

As shown above, keeping a Printf statement is not possible for our application as it is inserting delay.

While configuring the User logic connection with Processor, I used Avalon_Slave_0 bus for Reading & Avalon_Slave_1 for writing. And there is no wait cycle kept there.

My VHDL code for User Logic is:

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

use IEEE.STD_LOGIC_ARITH.ALL;

use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity Inverter is

Port ( clk : in std_logic;

reset : in std_logic;

cs : in std_logic;

wr : in std_logic;

din : in std_logic_vector(7 downto 0);

rd : in std_logic;

dout : out std_logic_vector(7 downto 0));

end Inverter;

architecture Behavioral of Inverter is

begin

process ( cs, clk,reset)

begin

if (reset = '1') then

dout <= "00000000";

elsif ( clk'event and clk = '1') then

if( cs = '1' and wr = '1') then

dout <= not(din);

end if;

end process;

end Behavioral;

So I am looking for a possible solution withoug inserting delay http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/huh.gif

Altera_Forum · ‎05-26-2006

You have to set bit 31 of the p pointer, to uncache the io access.

p = 0x00800050; => p = 0x80800050;

Altera_Forum · ‎05-26-2006

Hi Hippo,

Thank You Very Much.

That simple mistake created lots of confusion. Finally problem is solved.

Regards,

K V Naresh