Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
12748 Discussions

Interniche IP stack performance

Altera_Forum
Honored Contributor II
‎06-13-2010 02:06 AM
1,264 Views

Hello all, 

 

Was wondering if anyone has characterized the performance of the interniche IP stack throughout it's various configurations (full tcp/ip udp/ip, only upd etc) and been able to show performance gains in tuning... I am considering hw acceleration and am wondering if I will be able to tweak the system for performance (running straight udp - as stripped down as possible, with full 65,507 byte data fields) in order to avoid my next step. I'm running a gigabit link thru tse - wondering what kind of MBpS I can expect at best case... also any input on the parameters to change would be. 

 

Thanks - Chris
0 Kudos

Link Copied

1 Reply
Altera_Forum
Honored Contributor II
‎06-23-2010 05:49 PM
516 Views

There is an Altera app note that does list various speeds over different RAM and hardware checksumming methods. We chose to use lwIP because it's faster (I don't have exact numbers but I know it to be faster) and because lwIP doesn't require uC/OS-II. Whereas Interniche "superloop" mode is hard to get running and barely documented, lwIP has an efficient "RAW API" mode that does support a superloop type of mode. lwIP also has a netconn API as well as a BSD mostly-compatible socket API. 

 

Bill
0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.