Hi all,
I currently have a design that uses a Nios II processor with a MMU that is designed to boot linux v3.10.31. Due to some clock domain timing errors that Quartus has been reporting, we added a Clock Crossing Bridge (ccb) Qsys com to the design. Once this was done, I updated all the necessary files and burned them to flash (.dts / .dtb and custom_fpga.h via the sopc2dts utility, u-boot image and the kernel image) on our Altera development kit board.
However, when load the appropriate .sof file that contains the ccb component, linux does not boot. In fact, nothing is seen on the JTAG UART output. Even the initial U-boot banner doesn't appear. But, if I revert to an earlier design that doesn't contain a ccb component, U-boot will launch and the kernel will boot and allow me to log in.
Does anyone have any idea what could cause this? Since we were dealing with clock domains here using the ccb component, is it possible that some of the clocks connected to this component were done incorrectly?
Has anyone run into a problem like this before or has some idea what the problem might be or where to look for more clues?
Any feedback would be appreciated.
- Brad
