Nios® V/II Embedded Design Suite (EDS)
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NIOS + FPGA logic co-simulations

amildm
Valued Contributor I
471 Views

Hi All,

 

 Is it possible to simulate NIOS SW along with FPGA logic (HDL code)? How? Is there such Design Example? Where could it be downloaded from?
 
Thank you!
 

 

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1 Solution
2 Replies
EBERLAZARE_I_Intel
465 Views

Hi,


You can check the document below , and see if this is what you are looking for:

https://www.intel.com/content/www/us/en/docs/programmable/683689/current/simulating-embedded-processor-designs.html



EBERLAZARE_I_Intel
459 Views

Hi,


May I know if you require further help?


Reply