NIOS II Boot Process

Navneet · ‎08-11-2021

Hi,

I have a cyclone V FPGA development board 5CEBA4F23C7N with an EPCS64 attached to it for non volatile memory purpose.

I created a NIOS II application for it that could be boot loaded to the SDRAM using boot copier.

I Placed an Legacy EPCS/EPCQx1 Flash Controller in the platform designer and set the reset vector to the base address of the EPCS Controller and the exception vector to the on chip memory.

In the software side I edit the BSP settings to to disable all the options as the documents says(Image attached). and changed the region in the linker to ON chip memory.

But then when I launch the flash programmer it does nothing. I selected the .sof and the elf file for that project. only thing that appear in the programmer is the generating scripts no problems are shown either.(Image attached)

I even tried to reinstall the whole Quartus software along with the WSL ubuntu18LTS, still the flash programmer does not work.

I even tried to generate using mem_init_generate to generate the HEX file and using the convert in Quartus prime tried to generate the .jif file, but only the hardware side works, the softcore does not get loaded.

Useing Quartus Prime Lite 20.1.1.

Can someone please help me out here..

James_B · ‎08-18-2021

When using the mem_init_generate, make sure to attach the resulting .hex file to the onchip memory in platform designer, then regenerate platform designer, then recompile the project in Quartus.

-James

aikeu · ‎09-20-2021

Hi Navneet,

Do you still require help for this?

Thanks.

Regards,

Aik Eu

aikeu · ‎10-05-2021

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