Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
12600 Discussions

NIOS II Booting methods for MAX10 FPGA

MMuth8
Beginner
1,022 Views

Hi,

 

We are using MAX10 FPGA and NIOS II processor. We have on board FLASH MEMORY(NOT QSPI), and nios code will be placed in the same. We need that the NIOS to be booted from on board flash, Is it possible?

In document AN730(NIOS II booting methods in MAX10 FPGA), which option(there are 5 options) do we need to follow?

 

Thanks,

Mahalakshmi

 

0 Kudos
6 Replies
EricMunYew_C_Intel
Moderator
974 Views

Hi, Mahalakshmi

 

Option 4 allows you to execute your application on external flash and data on external RAM.

And Option 5 allows you to copy your application and data from external flash to external RAM, and then run both from the external RAM.

 

Thanks.

 

Eric

 

 

 

0 Kudos
MMuth8
Beginner
974 Views

Hi Eric,

 

Thanks for your reply,

 

It is not a QSPI, we need to boot from external parallel flash, Can we still use option 4 or 5?

Please confirm.

 

Thanks,

Mahalakshmi

0 Kudos
EricMunYew_C_Intel
Moderator
974 Views

Hi, Mahalakshi

 

Yes, you can boot MAX10 from external parallel flash using Intel CFI IP in your Nios design.

 

Do you still have any questions ?

 

Thanks.

 

Eric

0 Kudos
MMuth8
Beginner
974 Views

Hi Eric,

 

we are using Quartus 15.0, and TRI STATE CONTROLLER IP to interface external parallel flash.

I did not find CFI IP in Quartus 15.0

 

Can we proceed with TRI STATE CONTROLLER IP itself and boot nios from this external parallel flash?

 

Thanks,

Mahalakshmi

0 Kudos
EricMunYew_C_Intel
Moderator
947 Views

Hi, Mahalakshmi


You can boot Nios II with MAX10 FPGA from an external parallel flash.

You may try 19.2 or later.


You may refer to below for the implementation:


https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/nios2/edh_ed_handbook.pdf (page314)


https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_pfl.pdf


https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_avalon_tc.pdf


By the way, can we close it if you have no more inquiry ?


Eric



0 Kudos
praveenkumar
Beginner
796 Views

can anybody help me the cfi parallel flash using generic tri state controller

0 Kudos
Reply