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New version of NiosII Flash Programmer

Altera_Forum
Honored Contributor II
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Hello, 

I'm reading the manual for the Nios II Flash Programmer User Guide, but it appears to not cover my software? 

On page 18, figure 1-3 shows options for "Program flash memory with software project" - I do not have this at all on my display? http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/huh.gif  

I&#39;m fully patched up 4.1 sp2? 

 

help! I&#39;m trying to understand how to place my program into the EPCS after the bitsream!! http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/blink.gif  

 

Thanks for any and all guidance offered! 

joe
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Altera_Forum
Honored Contributor II
1,305 Views

Joe, 

 

If you are refering to the Nios II Flash Programmer User Guide ver 1.1, Jan 2005 then this version has been updated for Nios2 v1.1. Nios2 v1.1 requires Quartus2 v4.2. You may need to upgrade to the latest versions of Quartus and Nios2. Refer: 

 

nios ii & nios processor version compatibility with quartus ii software & sopc builder (http://www.altera.com/support/ip/processors/nios2/compatibility/ips-nios2_compatibility.html

 

However there is a patch for Nios2 1.1 to address a problem booting the EPCS4. You need to apply this after installing Nios2 1.1. Refer: 

 

nios ii development kits version 1.1 errata (http://www.altera.com/support/ip/processors/nios2/ips-nios2_devkit1.1-er.html#config

 

Once upgraded just following the Nios II Flash Programmer User Guide and you should have no problems getting it to boot from the EPCS4. 

 

Good luck. 

 

Bob.
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Altera_Forum
Honored Contributor II
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I am using Nios2 1.0, updates/patches from Altera. 

 

I notice that 1.1 (Evaulation) is available for download - but since it needs quartus 4.2 I can&#39;t use that. 

 

Did the Flash Programmer work in Nios2 1.0 ? 

 

So far I haven&#39;t got to the stage where I would expect it to boot, for the moment I can&#39;t get past this sync error while trying to program to device from flash programmer..... 

 

I wonder has *anyone* manged to get this to work? Maybe most folks boot from an external flash memory and avoid these problems/issues? 

 

Thanks! 

http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/ohmy.gif
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Altera_Forum
Honored Contributor II
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Hi joe, 

 

> Did the Flash Programmer work in Nios2 1.0 ? 

 

Yes ... I&#39;m still using 1.0. 

 

> I wonder has *anyone* manged to get this to work? 

 

Yes. 

 

> I&#39;m trying to understand how to place my program into the 

> EPCS after the bitsream! 

 

The following topic describes how to load/boot the u-boot monitor 

into/from the EPCS: 

http://www.niosforum.com/forum/index.php?a...3&hl=bootloader (http://www.niosforum.com/forum/index.php?act=st&f=17&t=1023&hl=bootloader

 

> I can&#39;t get past this sync error while trying to program to device from 

> flash programmer..... 

 

What &#39;sync&#39; error are you referring to? 

 

Regards, 

--Scott
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Altera_Forum
Honored Contributor II
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Thanks for your help! 

 

here are the details (also in http://www.niosforum.com/forum/index.php?a...=st&f=17&t=1033 (http://www.niosforum.com/forum/index.php?act=st&f=17&t=1033) ) 

When I try to program an EPCS device using the Nios II Flash Programmer and my own custom Cyclone board, I get the error: make: *** [epcs_controller_boot_rom_programflash] Error 5 

 

or in more detail..... 

 

 

make: Entering directory `/cygdrive/f/projects/emshw/full_featured/software/ems_boot/Release&#39; 

28-Jan-2005 14:40:30 - (INFO) nios2-flash-programmer: Launching Quartus Programmer to download: 

f:/projects/emshw/full_featured/target_board/system/target_board.sof 

Send (64) failed. 

Unable to synchronize with target. 

28-Jan-2005 14:41:18 - (SEVERE) nios2-flash-programmer: Error opening target hardware 

28-Jan-2005 14:41:18 - (SEVERE) nios2-flash-programmer:  

In order to program flash, you must first create a purpose-built 

flash-programming design (i.e. FPGA configuration) and associate it with 

your particular board. The Nios development kit is delivered with purpose-built 

flash-programming designs pre-built for several development boards. If you wish 

to program flash on your own board, you must first create a flash-programming 

design. 

 

The process of creating a flash-programming design for your board is mostly 

automated. From a bash-shell, execute this script: 

 

mk_target_board --help 

 

The help-message includes references to other documentation on programming 

flash and targeting Nios systems to custom board designs. 

 

 

 

 

 

Then this windows message-box pops up.... 

--------------------------------------------------------------------------------------------------- 

java.exe - Application Error 

 

The instruction at "0x032c2140" referenced memory at "0x033e2390". The memory could not be "read". 

 

Click on OK to terminate the program 

--------------------------------------------------------------------------------------------------- 

 

 

 

 

 

Then I click OK and the Console output continues with... 

 

 

- exiting. 

make: *** [epcs_controller_boot_rom_programflash] Error 5 

make: Leaving directory `/cygdrive/f/projects/emshw/full_featured/software/ems_boot/Release&#39;
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Altera_Forum
Honored Contributor II
1,305 Views

hi joe, 

 

> When I try to program an EPCS device using the Nios II Flash 

> Programmer and my own custom Cyclone board .... 

 

<snip> 

 

> Launching Quartus Programmer to download: 

> f:/projects/emshw/full_featured/target_board/system/target_board.sof 

 

Sounds like a problem with your programming design. Is this your custom 

programming design file? -- The one generated by building the design from 

mk_target_board? It looks like nios2-flash-programmer is attempting to 

communicate with the programming design but is failing.
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Altera_Forum
Honored Contributor II
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yes, that is the mk_target_board design. I used the following :- 

 

The command I entered was basically as shown in the screen on page 24 of the User Guide :- 

 

mk_target_board --name=target_board --family=cyclone --clock=50 --index=1 --buffer_size=4096 --epcs=U2 

 

My device is a 1C12, and I chose 4096 instead of 16384 just to be safe!! 

 

I had some problems initially with quartus complaining about constraints, until I removing the asmi component. I added the EPCS controller and labelled it as U2. 

 

Can I ask, do you thing is a reset input pin necessary for the programmer to work? I do not have a reset signal on my board - just a watchdog reset input which I do not connect to the programmer design, since I don&#39;t want to reset it!!! So at the moment I just tie reset to vcc on the schematic?
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Altera_Forum
Honored Contributor II
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joe, 

 

Ok ... now I&#39;m up to speed after reading the other topic. 

 

> I do not have a reset signal - only a watchdog reset input which I do 

> not connect to the programmer design, since I don&#39;t want to reset it!!! 

> So at the moment I just tie reset to vcc on the schematic? 

 

This is probably your problem ... I have a similar situation as you on one 

of my boards, so I dropped in a little delay counter that drives the system 

module reset_n. Here&#39;s what I use with the programmer design: 

 

module cpurst (        clk,        rsti_n,        rsto_n ); input        clk; input        rsti_n; output     rsto_n; /* Counter width, delay is 1 << (cw-1) */ parameter cw  = 9; reg        cnt; always @(posedge clk)        if (rsti_n == 0) cnt = 1&#39;b0;        else if (cnt == 0) cnt = cnt + 1&#39;b1; assign rsto_n = cnt; endmodule 

 

You can just tie rsti_n to Vcc, clk to your device clk input and rsto_n to 

the system module reset_n.  

 

Regards, 

--Scott
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Altera_Forum
Honored Contributor II
1,305 Views

scott, 

so i need a delay block on the reset pin for the programmer-design? like the one on the dev.kit? I still have that on my schematic for the FPGA design, since I derived everything from that devkit reference design. 

i hadn&#39;t thought of needing it on the programmer design though? interesting idea! 

certainly, i will try this and see what happens! 

joe
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Altera_Forum
Honored Contributor II
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> so i need a delay block on the reset pin for the programmer-design 

> like the one on the dev.kit? 

 

Yes. 

 

BTW: You might want to use the full buffer sizes too ... it should 

improve your download performance. 

 

Hope you&#39;re up-and-running shortly :-) 

 

Regards, 

--Scott
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Altera_Forum
Honored Contributor II
1,305 Views

Well, it has certainly resulted in a step forward!!! now it communicates with the target but has something new to complain about!!  

 

I don&#39;t know what it means by "Unrecognized EPCS device ID: -1" 

 

 

 

make: Entering directory `/cygdrive/f/projects/emshw/full_featured/software/ems_boot/Release&#39; 

29-Jan-2005 17:39:35 - (INFO) nios2-flash-programmer: Launching Quartus Programmer to download: 

F:/projects/emshw/full_featured/target_board/system/target_board.sof 

Unrecognized EPCS device ID: -1 

29-Jan-2005 17:39:47 - (SEVERE) nios2-flash-programmer: Error opening target hardware 

29-Jan-2005 17:39:47 - (SEVERE) nios2-flash-programmer: Unable to open flash-device after successfully communicating  

with target. 

It is likely that you are using a flash-programming FPGA design which 

was not created for your target board. 

 

In order to program flash, you must first create a purpose-built 

flash-programming design (i.e. FPGA configuration) and associate it with 

your particular board. The Nios development kit is delivered with purpose-built 

flash-programming designs pre-built for several development boards. If you wish 

to program flash on your own board, you must first create a flash-programming 

design. 

 

The process of creating a flash-programming design for your board is mostly 

automated. From a bash-shell, execute this script: 

 

mk_target_board --help 

 

The help-message includes references to other documentation on programming 

flash and targeting Nios systems to custom board designs. 

- exiting. 

make: *** [epcs_controller_boot_rom_programflash] Error 5 

make: Leaving directory `/cygdrive/f/projects/emshw/full_featured/software/ems_boot/Release&#39;
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Altera_Forum
Honored Contributor II
1,305 Views

> Unrecognized EPCS device ID: -1 

 

-1 ... 0xff ? ... it might be time to pull out the scope to check 

your chip select, clock & data signals ... sounds like the data 

line could be stuck. 

 

Or you might want to try accessing the epcs device directly via 

asmi using xxxBlaster if you have a header available -- just to 

confirm your copper. 

 

If you&#39;re using u-boot, you can enable epcs support, download 

it via jtag & use the epcs commands to test. 

 

Regards, 

--Scott
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Altera_Forum
Honored Contributor II
1,305 Views

Yes, I can program the EPC4 via the byteblaster header. 

 

I will have to find out what u-boot is.
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Altera_Forum
Honored Contributor II
1,305 Views

Maybe it is something with combining AS and JTAG configuration scheme....? 

 

From within quartus should I not be able to autodetect the FPGA and the Serial configuration device on the Jtag bus? 

 

I can only see the FPGA? 

 

My only way of seeing/programming the Seial Configuration device is thru the byteblaster header.
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Altera_Forum
Honored Contributor II
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> From within quartus should I not be able to autodetect the FPGA 

> and the Serial configuration device on the Jtag bus? 

> I can only see the FPGA? 

 

You should only see the FPGA. The epcs is behind the FPGA from a 

JTAG point-of-view ... that&#39;s why the flash programmer design is necessary. 

 

> My only way of seeing/programming the Seial Configuration device is 

> thru the byteblaster header. 

 

If you don&#39;t have a flash programmer design, you are correct -- you would 

have to use the ASMI w/xxxBlaster. If you do have a (working) flash 

programmer design you can do everything through JTAG and avoid placing 

yet another header on your board. 

 

Joe, are you sure that your FPGA is properly loading its configuration from 

the epcs? You might want to program the epcs via ASMI and debug from 

there. 

 

Regards, 

--Scott
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Altera_Forum
Honored Contributor II
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I actually get the same (Unrecognized EPCS device ID: -1) using the devkit nios board? I did that mk_target_board thing again,etc - but this time bound it to the devkit ref design..... is it likely my tools are screwed up here? 

 

also, the message : 

Input file empty--no data to program into flash. Exiting. 

 

seems odd? or is that simply talking about the external AMD flash having nothing to program with (which is fine) 

 

Anyways,my console gives me this.... 

 

make: Entering directory `/cygdrive/f/projects/devkit/full_featured/software/devkit_standalone_test/Release&#39; 

nios2-flash-programmer --input=ext_flash.flash --sof=`F:/altera/quartus41/sopc_builder/bin/find_sopc_component_dir dev_kit_board_test`/system/dev_kit_board_test.sof --device=1 --base=0x00800000 

31-Jan-2005 13:50:00 - (INFO) nios2-flash-programmer: Input file empty--no data to program into flash. Exiting. 

31-Jan-2005 13:50:09 - (INFO) nios2-flash-programmer: Launching Quartus Programmer to download: 

F:/projects/devkit/full_featured/dev_kit_board_test/system/dev_kit_board_test.sof 

Unrecognized EPCS device ID: -1 

31-Jan-2005 13:50:28 - (SEVERE) nios2-flash-programmer: Error opening target hardware 

31-Jan-2005 13:50:28 - (SEVERE) nios2-flash-programmer: Unable to open flash-device after successfully communicating  

with target. 

It is likely that you are using a flash-programming FPGA design which 

was not created for your target board.
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Altera_Forum
Honored Contributor II
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I have tried a simple test, using the pre-built target board flash programmer. Apart from a Java application erro at the very end, it sucessfully programs the EPC device on my Nios Cyclone Devkit via the JTag connector.  

 

So..... the .sof pre-built programmer from Altera for the dev-kit works okay. 

 

However, if I try to build my own target_board (for the nios devkit) using this line:- 

 

ml_target_board --name=dev_kit_board_test --family=cyclone --clock=50 --index=1 --buffer_size=16384 --epcs=U59 

 

and try to then use this flash programmer design the failure is as follows, so this &#39;Unrecognized EPCS device ID: -1&#39; must be a problem with my tools?  

 

Is it possible to get the source-design for the Altera Flash Programmer, since it clearly works - and presumaly it was generated using the mk_target_board utility? If this is the case, what exact command-line parameters were used? 

 

http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/ohmy.gif  

 

 

make: Entering directory `/cygdrive/f/projects/devkit/full_featured/software/devkit_standalone_test/Release&#39; 

nios2-flash-programmer --input=ext_flash.flash --sof=`F:/altera/quartus41/sopc_builder/bin/find_sopc_component_dir dev_kit_board_test`/system/dev_kit_board_test.sof --device=1 --base=0x00800000 

31-Jan-2005 15:36:08 - (INFO) nios2-flash-programmer: Input file empty--no data to program into flash. Exiting. 

31-Jan-2005 15:36:16 - (INFO) nios2-flash-programmer: Launching Quartus Programmer to download: 

F:/projects/devkit/full_featured/dev_kit_board_test/system/dev_kit_board_test.sof 

Unrecognized EPCS device ID: -1 

31-Jan-2005 15:36:36 - (SEVERE) nios2-flash-programmer: Error opening target hardware 

31-Jan-2005 15:36:36 - (SEVERE) nios2-flash-programmer: Unable to open flash-device after successfully communicating  

with target. 

It is likely that you are using a flash-programming FPGA design which 

was not created for your target board. 

 

In order to program flash, you must first create a purpose-built 

flash-programming design (i.e. FPGA configuration) and associate it with 

your particular board. The Nios development kit is delivered with purpose-built 

flash-programming designs pre-built for several development boards. If you wish 

to program flash on your own board, you must first create a flash-programming 

design. 

 

The process of creating a flash-programming design for your board is mostly 

automated. From a bash-shell, execute this script: 

 

mk_target_board --help 

 

The help-message includes references to other documentation on programming 

flash and targeting Nios systems to custom board designs. 

- exiting. 

make: *** [epcs_controller_boot_rom_programflash] Error 5 

make: Leaving directory `/cygdrive/f/projects/devkit/full_featured/software/devkit_standalone_test/Release&#39;
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Altera_Forum
Honored Contributor II
1,305 Views

There must be some problem with the mk_target_board script?  

I can&#39;t even build a target for the devkit correctly? 

 

Quite frustrating this. Is there *Any* chance altera will provide a simple utility program to produce a *single* programming file that I could use to send to the EPCS via the byteblaster header? 

 

please! 

 

If such a progam existed, then I could avoid all this derived-programmer-design lark. 

 

??? http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/huh.gif
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Altera_Forum
Honored Contributor II
1,305 Views

what on earth is the magic ingredient here folks? 

 

any ideas? 

 

http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/ohmy.gif
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Altera_Forum
Honored Contributor II
1,305 Views

> any ideas? 

 

If you do the following from the nios-II shell ...: 

 

$ nios2-flash-programmer --epcs --erase --sof=<flash_programmer_sof> 

 

... what do you observe?
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Altera_Forum
Honored Contributor II
1,261 Views

[SOPC Builder]$ ls *.sof 

dev_kit_board_test.sof* 

/cygdrive/f/projects/devkit/full_featured/dev_kit_board_test/system 

[SOPC Builder]$ nios2-flash-programmer --epcs --erase --sof=dev_kit_board_test. 

sof 

01-Feb-2005 14:27:01 - (INFO) nios2-flash-programmer: Launching Quartus Programm 

er to download: 

dev_kit_board_test.sof 

Unrecognized EPCS device ID: -1 

01-Feb-2005 14:27:17 - (SEVERE) nios2-flash-programmer: Error opening target har 

dware 

01-Feb-2005 14:27:17 - (SEVERE) nios2-flash-programmer: Unable to open flash- 

device after successfully communicating 

with target. 

It is likely that you are using a flash-programming FPGA design which 

was not created for your target board. 

 

In order to program flash, you must first create a purpose-built 

flash-programming design (i.e. FPGA configuration) and associate it with 

your particular board. The Nios development kit is delivered with purpose-bui 

lt 

flash-programming designs pre-built for several development boards. If you wi 

sh 

to program flash on your own board, you must first create a flash-programming 

design. 

 

The process of creating a flash-programming design for your board is mostly 

automated. From a bash-shell, execute this script: 

 

mk_target_board --help 

 

The help-message includes references to other documentation on programming 

flash and targeting Nios systems to custom board designs. 

- exiting. 

/cygdrive/f/projects/devkit/full_featured/dev_kit_board_test/system 

[SOPC Builder]$
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