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New version of NiosII Flash Programmer

Altera_Forum
Honored Contributor II
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Hello, 

I'm reading the manual for the Nios II Flash Programmer User Guide, but it appears to not cover my software? 

On page 18, figure 1-3 shows options for "Program flash memory with software project" - I do not have this at all on my display? http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/huh.gif  

I&#39;m fully patched up 4.1 sp2? 

 

help! I&#39;m trying to understand how to place my program into the EPCS after the bitsream!! http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/blink.gif  

 

Thanks for any and all guidance offered! 

joe
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Altera_Forum
Honored Contributor II
278 Views

after that console output a windows message box pops up with this... 

 

java.exe - Application Error 

 

The instruction at "0x02cb2140" referenced memory at "0x033f2390". The memory could not be "read". 

 

Click on OK to terminate the program 

 

 

Note that I am now trying to get mk_target_board goin with the standard cyclone nios test board. If I use the default .sof that is shipped with nios then it programs the EPCS..... but at the end that java.exe error still pops up? Having said that it does seem to accomplish its task before crashing.... 

 

what do you type to the mk_target_board for the devkit in order to build a working programmer?
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Altera_Forum
Honored Contributor II
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Thanks for the advice by the way. It is much appreciated because Altera mySupport are not coming back with anything so far.... http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/huh.gif

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Altera_Forum
Honored Contributor II
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Altera_Forum
Honored Contributor II
278 Views

I tried running SOPC builder,etc to see if that helped.... nope. 

 

Since I have a compactflash card to boot off I will try to see if I can construct my own small bootloader which I can place in a on-chip firmware ROM?  

 

Is this handy enough to map into NIOS,etc? I can budget about 8KBytes of on-chip for it.... 

 

not ideal solution, but beggars can&#39;t be........... (well - you know what I mean!) 

http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/laugh.gif  

 

Is it possible to force a FPGA reset (cold start,reconfig,etc) from within a design? If so, then I could use an on-chip RAM for the boot code (initialised with bootstrap code on initial bitstream) and once I&#39;m up and running it could serve then as a general on-chip scratch RAM or some useful purpose? 

 

is this possible?
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Altera_Forum
Honored Contributor II
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hmmm... there does not seem to be access to nCONFIG from inside the FPGA? does this mean there is no way to route an external reset in to restart the whole config process for the bitstream? I have a watchdog input but resetting the nios would not be enough since I&#39;d need the bitstream restart to effectively re-load the boot code initialisation into the internal RAM? a ROM then it must be. 

 

thats a shame. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/dry.gif
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Altera_Forum
Honored Contributor II
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this nios stuff is good when it works..... but any problems with tools and as a designer Altera leave me up the river without a paddle. 

 

no help from mySupport to get the damn flash programmer working, so I can&#39;t build my product stand-alone. 

 

i&#39;m not impressed. 

 

perhaps somebody with working tools could grow me a .sof for a flash programmer?
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