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Hi,
I'm using the C5 Soc Kit from terasic. http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=205&no=816 I have created a Nios system with qsys in q13.1 (on windows 7). See attachement qsys.png The clock is connect ok, because parallel to the nios a counter is running on the same clock and that is displayed on some leds. I create a hello world small project with the following code# include "sys/alt_stdio.h"
int main()
{
/* Event loop never exits. */
while (1)
{
alt_putstr("Hello from Nios II!\n");
alt_putstr(" Hello from Nios II!\n");
alt_putstr(" Hello from Nios II!\n");
alt_putstr(" Hello from Nios II!\n");
alt_putstr(" Hello from Nios II!\n");
alt_putstr(" Hello from Nios II!\n");
}
return 0;
}
When I run this in the c-perspective I see in the console that the processor is started. see attached c-cpp_perspectief-console-window.png In the jtag uart nios console I don't see anything. See c-cpp_perspectief-jtag-uart-console.png When I start the debugger, then suddenly I see what I expect. See debug-perspective.png Any idea why it is running in debug mode and not in "normal" mode? Should there be a pll involved in qsys? Rgds, Kimberley
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Your project is using the JTAG UART. This is only available when the debugger is running.
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I've found also that the JTAG UART is shaky at least, I've spent my share of time trying to fix what wasnt wrong.
I'd suggest if you are using a board with serial connection to use it instead of the JTAG. I've seen this suggestion posted somewhere else and it saved me tons of time. I would also suggest using PIO with LEDs to convey some sort of watchdog, that the program is in fact alive and running instead of relying on the JTAG UART output.- 新着としてマーク
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I've found also that the JTAG UART is shaky at least, I've spent my share of time trying to fix what wasnt wrong.
I'd suggest if you are using a board with serial connection to use it instead of the JTAG. I've seen this suggestion posted somewhere else and it saved me tons of time. I would also suggest using PIO with LEDs to convey some sort of watchdog, that the program is in fact alive and running instead of relying on the JTAG UART output.- 新着としてマーク
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Since when is the jtag uart only for debug?
In quartus 10 and before i used it without almost any problem, in sopc builder. Is that also the reason why the nios how has a special jtag debug mode pins. These are new to me, and were not there in a nios in sopc builder AFAIK. Does the clock frequencie also matters. I'm feeding it now with a 50 mhz clock. Perhaps it need to be 20 mhz for the jtag only?- 新着としてマーク
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Do you have a push button or FPGA reset that you can use at top level? I am concern with the jtag_debug_module_reset_output driving the clock source IP. Can you instead export the clk_in_reset? Probably you can use the System >> Create Global Reset Network for correctly hooking up the jtag reset output.
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--- Quote Start --- Do you have a push button or FPGA reset that you can use at top level? I am concern with the jtag_debug_module_reset_output driving the clock source IP. Can you instead export the clk_in_reset? Probably you can use the System >> Create Global Reset Network for correctly hooking up the jtag reset output. --- Quote End --- @ mikedsouze: I've followed your suggestions. - I've exported the clk_in_reset - I've created a global reset network. - See attachment qsys_reset_export_system_generated_reset_netw.png - I've updated my verilog code
assign nios_reset = KEY;
nios_4b_qsys NIOS2
(
.clk_clk(clk), //, // clk.clk
.reset_reset_n(nios_reset) // reset.reset_n
);
And now it works in normal mode!!! Not after the first download when I press the run button in eclipse, but when I press the key that is connected to the nios_reset signal in my code. Thanks a lot mikedsouze @fredbk: Thanks for the suggestion for using a PIO with a LED. The PIO would be my next IP to add to my nios system. Using it as a watchdog is very helpfull. Rgds, Kimberley
