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Nios2 Internal Memory

Altera_Forum
Honored Contributor II
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About a year ago, I started a pinewood derby timer as a home project. At the time, I developed a PC application that would control/receive data from a timer. I had an Altera up-1 board with a 10K70, so I was planing to do the timer on it.  

 

Then just recently, since I was evaluating NIOS, I decided to do the timer in NIOS2. Did the whole design in less than 4 hours minus the hardware interface. The platform was a 1C3 with 4K internal RAM loaded with the application software (SDK). I had the softare designed and debugged, so I did the Quartus SOPC with the final application. Then I recompiled the design and re-programmed the configuration device. However the application does not run from reset. I have loaded test programs in the internal RAM using the NIOS1 several times with no problem. Is there something that I need to do with NIOS2 sdk? Up to this point the two SDK environments work the same.
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Altera_Forum
Honored Contributor II
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Bump... Still stuck....

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Altera_Forum
Honored Contributor II
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I understood everything except the run from reset part. If you download the code it works but then you reset the system and it stops because it doesn't come out of reset? If that's the case it might be the timer that times out, or you're RAM being corrupted coming out of reset (.... don't really know since I'm not sure of the question really)

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Altera_Forum
Honored Contributor II
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I just remembered a problem I had when I first started with NIOS II (it magically disappeared so I forgot about it). 

 

The CPU might need to be held in reset for a bit longer then the actual reset signal. You can do this using the hardware 

in the sample that they give you (it was a down counter that started from the reset being triggered and delayed the 

reset to the CPU for quite a few clock cycles). I don't remember all the details, but if you look at the same design you'll 

know what I'm talking about since there is some logic in there that doesn't look like it should be there at first glance. 

 

G-luck.
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Altera_Forum
Honored Contributor II
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Still have not been able to get the Nios2 to boot from internal memory. I did however notice after looking at the object dump that my code starts at 0x1100 (RAM base is 0x1000). Using the nios2-console, a reset put the pc at 0x1000. I am assuming that there is some reset code that the NIOS2 sdk provided. When I use the SOPC builder, should I set the reset vector to 0x1100, or leave it alone. Doesn't look like it is not using the reset vector correctly. Please help..... 

 

 

Rick
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Altera_Forum
Honored Contributor II
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What you're seeing is normal so that won't be the problem. 

 

Right at the beginning is the reset code (a little bit of a pain, but at least it's smaller then the big vector table that NIOS I had). 

 

It's been a while since I've read this one. How do you know it's not coming out of reset? Are you trying to download the code, 

and you get an error message? (make sure you turn off the system ID thing in the downloader if you don't have that core attached). 

 

Need a bit more info on what you are trying to do (if you get an error message from the IDE post it since I've managed to cause 

them all hehe).
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Altera_Forum
Honored Contributor II
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Finally got it to work. All I needed was to pass the base address to the nios2-build. It worked like a champ! I now have a single chip solution for the Nios2e. I have to stay with the SDK environment cause the code size is much smaller and my internal memory is super small (4k). However, as soon as I get my hands on a Cyclone 2C5, the IDE/HAL will be the order of the day. 

 

Rick
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Altera_Forum
Honored Contributor II
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Good for you (because I wouldn't have guessed that). 

 

If you don't use the jtag downloader you can save memory (but you'd have to rebuild the hardware each time a software change is made).
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