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12748 Discussions

Problem with VGA controller

Altera_Forum
Honored Contributor II
1,891 Views

Hello! 

I include in my project lcd vga controller from the auto_graphics_ref_design-v1.0.4 . I see on the screen simple graphics( lines, boxes, circules), but image is very unstable: it jumping and shivering. I spent a LOT of time to find the reason but all for nothing. LCD operating correctly, vga timing also correct. Do anyone use this refdesign? Whether may be mistakes? Please help!!!
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Altera_Forum
Honored Contributor II
710 Views

Hello Nick, 

 

a few months ago i got this reference design as well. I got it up and running easily on a EP2C35. My assumption would be that your electrical connection is the source of your problem. Ensure that pixel clock, vsync and hsync are properly shield versus ground or otherwise you will have a distorted image display. I used the proto pins on the EP2C35 board to connect it with a small TFT display using prefab'ed 25cm wires. Without shielding the aforementioned signals i got a distorted display as well. Entangling pixel clock wire with a ground wire did the trick (likewise with vsync and hsync).
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Altera_Forum
Honored Contributor II
710 Views

hi there, 

I m using this design too, and I face the same problems. 

Maybe its due to the sdram pll ( the phase). 

after all, the displaying is correct for certain resolutions and shapes?! 

Does the I2C controller with this design okay? 

because I m alwas getting FF! 

see you.
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Altera_Forum
Honored Contributor II
710 Views

Hmm, have you measured the video frame signals? If they are stable and you still get a distorted display it may indeed be sdram clock skew.

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Altera_Forum
Honored Contributor II
710 Views

Hello tembridis! I settled this problem. All was because my lcd require little different timings. Thats why a wrote my own lcd controller. But I have another problem. When I add second layer(with DMA), Fmax decreases very much.

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Altera_Forum
Honored Contributor II
710 Views

Why didnt you simple change the timing values in vga_timing.v? But then again, i too wrote my own controller as the reference design has too many limitations. Static palettes and hardcoded timing values render this design useless for me. Nick, is the Fmax decrease so bad that it affects the pixelclock? If so, can you elaborate abit more on how you added the second layer?

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Altera_Forum
Honored Contributor II
710 Views

 

--- Quote Start ---  

originally posted by tembridis@Mar 26 2007, 06:13 AM 

why didnt you simple change the timing values in vga_timing.v? but then again, i too wrote my own controller as the reference design has too many limitations. static palettes and hardcoded timing values render this design useless for me. nick, is the fmax decrease so bad that it affects the pixelclock? if so, can you elaborate abit more on how you added the second layer? 

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Hello tembridis! I changed vga_timing.v but Image was unstable too. I don&#39;t know why. Moreover Fmax was 50Mhz and this refdesign takes large resources. Thats why I got vga_timing.v and add dual-clock FIFO and avalon interface. Fmax with second layer was 60Mhz. Now I use only one lyaer with Fmax 90Mhz. I draw all by software.
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Altera_Forum
Honored Contributor II
710 Views

I&#39;m sorry but i can&#39;t quite follow you. Can you add a schematic that explains your system build? Mine looks like this for example 

 

http://www.tembridis.com/image/fpga-gpu-impl.jpg (http://www.tembridis.com/image/fpga-gpu-impl.jpg)
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