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SSRAM to DDR buffer copy

Altera_Forum
Honored Contributor II
1,260 Views

Hello, 

i've tried to copy a buffer stored in the SSRAM (2 Mbytes) that is filled by a VHDL block to a file, on DDR. 

 

Here is my code : 

 

void dumpDataToFile(void){ unsigned int addr, dataLength; unsigned char *buffer; FILE * outfile; dataLength= 2*1024*1024; buffer=(unsigned char *)malloc(dataLength); addr=(unsigned int *)SRAM_BASE; memcpy(buffer, addr, dataLength); outfile = fopen("data.bin", "wb" ); fwrite (buffer, dataLength, 1, outfile); fclose (outfile); free(bufferimg); } It works, but it's dramatically slow. 

 

About 4MBytes/sec. 

the file is in ramdisk, DDR as i said, so i don't understand why this is so slow. 

 

For my project, i don't need 200MB/s, but at least 15~20MB/s. 

both SSRAM and DDR have huge transfer rate compare to that poor 4MB/s 

 

i've tested each code line and it seems that for now it is the memcpy that slow down the function. 

read only in sram => fast 

fwrite => fast 

 

i've tested to read myself too, insteed of using memcpy and result are quite the same... 

 

My development platform is the cyclone II dev board, with a nios II and uClinux with 2.6.30 kernel. 

 

Any ideas on how i can increase my transfert rate ? 

Thank you in advance
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4 Replies
Altera_Forum
Honored Contributor II
567 Views

You can't expect hardware speed when writing data through file interface. It involves a large overhead (many instruction cycles per byte). NIOS II isn't a GHz Pentium processor.

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Altera_Forum
Honored Contributor II
567 Views

OK, thank you. for attention and quick reply.

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Altera_Forum
Honored Contributor II
567 Views

Using DMA rather than a memcpy would speed things up. You would of course need a DMA controller in your system. 

 

Jake
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Altera_Forum
Honored Contributor II
567 Views

Do you really think so ? A cycle of the code of the short memcpy() loop running in the cache should be a lot faster than the average time for a memory read and a memory write access to the external DDR, even if the cache properly queues accesses to the consecutive RAM bytes for the DRAM controller to do bursts.  

 

memcpy() should not be slow ! 

 

Does he have a decent DRAM controller with burst mode enabled ?  

 

Does he have an appropriate amount of cache configured ?  

 

-Michael
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