Simple Socket Tutorial Problem

[Altera_Forum]

Hello, 

 I've been attempting to basically run through the Simple Socket Server template and tutorial.  I've had previous problems attempting to use the hardware configurations from the examples that come with Quartus (precompiled SOPC builder arrangements that contain most of the functionality on a board, with pre-set pinning assignments). I believe these setups, which were intended for EP2C35F672C6 Cyclone II chip boards, are not correctly set up for the Altera DE2 Development and Education board which I am using (I feel this mostly based on the pre-set pinning assignments, which did not match the pinning assigments given by the DE2 Manual).  I am able to compile the custom SOPC design, the encompassing Quartus file, download the SRAM Object File .sof to the board correctly, create the Application from BSP and Template, and even build the file in NIOS II with no errors (I did have one warning regarding my placement of less LED PIOs included than expected via the Simple Socket Server). The problem comes about when I attempt to run the system; the .elf downloads in its entirety (almost 260kb!), but then fails during verification:   Downloading 00080000 ( 0%)  Downloading 00090000 (24%)  Downloading 000A0000 (49%)  Downloading 000B0000 (74%)  Downloading 000C0000 (98%)  Downloaded 259KB in 4.4s (58.8KB/s)    Verifying 00080000 ( 0%)  Verify failed between address 0x80000 and 0x8FFFF  Leaving target processor paused  I actually have seen similar threads on the forum posting about the problem; some possible suggestions so far for this particular error have been that the Flash component was not setup using the proper timing constraints (setup, wait, hold). However, I have attempted doing this with not only the CFI Flash module, but also with the University Program 512kb SRAM on the DE2 board instead. This module was designed specifically by the University Program, and would therefore (assumedly) have the correct timing constraints (as there are no adjustable specifications in this module anyway). I arrive at the exact same error during the download.  I have been able to download and run simpler programs, that did not use a Flash / SRAM module and only required On-chip Memory. I am using the Development and Education Altera DE2 Board, with Cyclone II chip (EP2C35F672C6) - Quartus II Version 9.1, Nios II Version 9.1. In addition, I am currently using a customized ethernet connection module since the available drivers for the ethernet in the SOPC Builder do not include this board's DM9000A hardware.  I would appreciate any suggestions or thoughts in general on this matter; I also did my best to research older posts on the forum, and apologize if this topic has been covered previously, or if this post has ended up in the wrong location.

[Altera_Forum]

Within the altera university program are design examples for the DE2 bord. You can download the design suite here: 

 http://university.altera.com/materials/tools/upds/?hdl=verilog&board=de2&quartusii=9.0  after you installed the package you can find Quartus example projects for the DE2 (in C:\altera\91\University_Program\NiosII_Computer_Systems\DE2\) with correct pin assignments. You can use these as an entry point for your own projects.  Jens

[Altera_Forum]

Thank you for this reply; seems like a good idea. I'll make sure to try out the pinning provided there and test the pinning assignments out.

[Altera_Forum]

Hi, 

 Open your SOPC system and check which is the component that locate in the address range. It is usually a memory component. Check the clock that drives this component. Study the documents of DE2 board. It could be due to clock skew problem for DE2 board.