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12748 Discussions

The problem of data convert

Altera_Forum
Honored Contributor II
‎03-18-2010 04:07 PM
1,119 Views

I want to convert the 32 bit data to 24 bit data from the FIFO,the clk is the read signal of the FIFO.the FIFO stop read data when the num is "00".but it's not right when I download the program to the FPGA.maybe there are some other problems in the LCD_CORE,could you help me? 

 

Thank you!
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