Triple Speed Ethernet (TSE) Design Example

[corestar]

I'm attempting to create a TSE using a NIOS-II in a Cyclone V GX. I found a very useful example here:

Using Triple-Speed Etherent on DE4 Boards 

and was able to create and compile the hardware using Quartus Prime 18.0 Standard. But I can't find the C source files that go with the example. They say to look at tse_tutorial.c, but I cannot find that file on the net. It shows how to setup the DMA and interrupts. I'm new to NIOS.

[SengKok_L_Intel]

Hi

The C - language source file tse_tutorial.c is given in the design files folder. Since this example is for the university program, as per the link below, please try to submit the request if you need the design file.

https://software.intel.com/content/www/us/en/develop/topics/fpga-academic/support.html

Regards -SK

[SengKok_L_Intel]

I will set this forum case to close-pending for now. The status will remain in this state for 15 calendar days, simply post a note in this forum and it will be reopened for further investigation.

[corestar]

I was never able to find the file or any other example. The University program you sent a link to is only for academics and did not provide any help.