I have some code that basically bangs bits out a PPort. At the moment I dont really care how fast it occurs, however; the optimizer, or something is basically makeing my code useles!
The code would be something like this: Pport->piodata = 0; Pport->piodata = 1; Pport->piodata = 0; It seems to optimize that to never togle the bit on, what do I do? Thanks! Randy链接已复制
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HI! my firts post here.
I think your problem is because optimizer "thinks" that your instructions can be removed because they have not effect on code. Your variable Pport is not readed by nobody after one writting, so that writting is not usefull. To tell to compiler to avoid this behavior, define your variable like this : volatile sometype Pport; RegardsThanks for the help guys.
Yes the structure (np_pio) is defined as a volitile. Which is why I dont understand why its doing this. It should be working! (thanks for making your first post helping out someone!) I have not been able to get the outb outw or outl to work yet. I included <asm/io.h> but it still says that it doesnt know what those functions are. Thanks.Thank you! that makes sense, the data cache!
I have no need for it for my particular project, so I just disabled it, but for future reference, How do you disable it (for particular chunks of memory) or get around it? What are those special access calls? Thank you very much. RandyProperly speaking, you should use the stwio and ldwio opcodes rather than the stw and ldw opcodes for hitting IO ports. outb() and inb() should basically be something like
static char inb(unsigned int addr) { char result; __asm__ __volatile__ ( "ldwio %0, 0(%1)" : "=r" (result) : "r" addr); } and the appropriate corresponding thing for outb. It's a pity that you can't get it to work with <asm/io.h>, as that's the right way to do it.I'm having a very similar problem with getting the PIO ports to work under uClinux.
I have the same basic problem. If I try to access the PIO by reading or writing to the memory location, pointed to by the pio struct, then nothing seems to happen. Monitoring the bit on the hardware side shows that it isn't toggling. I also have had problems using the outl and inl functions. It warns that they are not defined, even though asm/io.h is included. I little digging into asm/io.h shows that these inline macros aren't included, because their are behind an "#ifdef KERNEL". Basically, I guess the code was written, so that these inline macros are only valid from kernel space. So, getting back to direct access... I have data cache, but was under the impression that setting the most significant bit of the address would force the data to ignore cache and go out to memory space, therefore hitting the PIO registers. Is this not the case? Is there anything else that might be going wrong???