Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.

Working ISR example

Altera_Forum
Honored Contributor II
1,019 Views

Hello all, 

 

I was developing some new hardware and had problems debugging my own ISR. 

I got the code below from Slacker( modified slightly), and it helped me quickly zoom into my new hardware problem, spurious interrupt. I run the code and hardware through Modelsim 6.0c and it works fine. For a new piece of HW, just change base address and make your own interrupt source, mine is a fifo read that causes an underflow ( and an interrupt). 

 

I did see a problem with my component when I accidentally built my module with dynamic alignment instead of native. Of course I got incorrect reads( my peripheral is only 8 bits), but worse, my interrupt would be set and my isr would not work. Not sure why, but native alignment is correct for me anyway. 

 

Hope this is useful for someone. 

 

-Baycool 

 

****************************************** 

 

/* Includes */ 

# include "io.h"# include "system.h"# include "sys/alt_irq.h"# include <stdio.h># include <stdlib.h># include "alt_types.h" 

 

 

const unsigned int CMD_AVALON_BASE = (unsigned int) 0x00100800; 

unsigned int check_fifo; 

 

/* Assumes existence of SOPC component*/ 

 

/* The ISR for the irqgen component. */ 

static void handle_irqgen_isr(void* context, alt_u32 id) 

/* Extract the "count". */ 

int* count_ptr = (int*) context; 

/* Set the count variable. */ 

*count_ptr = 1; 

/* Clear the IRQ. */ 

IOWR(CMD_AVALON_BASE, 20, 1); 

 

/* "Initializes" the irqgen component. 

* - Registers and ISR 

*/ 

 

static void init_irqgen(int* count) 

/* Register the ISR. */ 

alt_irq_register( 1, count, handle_irqgen_isr ); 

 

 

/* The main loop. Capture Interrupt */ 

 

int main(void) 

printf("Begin Cmd Avalon Test!\n"); 

 

/* A count variable which tracks if an interrupt has occured. */ 

int count = 0; 

/* Initialize the irqgen component. */ 

init_irqgen( &count ); 

 

/* Cause Interrupt */ 

check_fifo = IORD(CMD_AVALON_BASE,0x0); 

printf("Fifo is : 0x%X \n", check_fifo); 

 

/* main loop */ 

while( 1 ) 

 

if( count == 1 ) 

printf(" Got interrupt, You lucky dog !! \n"); 

count = 0; 

 

}
0 Kudos
0 Replies
Reply