Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
Success! Subscription added.
Success! Subscription removed.
Sorry, you must verify to complete this action. Please click the verification link in your email. You may re-send via your
profile.
I turn a code under niosII . I have this error I don't understant it Pausing target processor: not responding. Resetting and trying again: FAILED Leaving target processor paused can you please help me to resolve this error regards
Two possible causes: - timing problems in Quartus compilation In case, recompile the design after constraining clocks or reducing frequency - Nios is disabled because you are using an unlicensed core In this case you should not stop USB blaster connection after you have configured fpga
