I have designed a software to implement the data transfer between the onchip memory and the SDRAM. during the debug, I fount that the dma only tranfer the last half data from the SDRAM to onchip memory, then creat the irq
to final the dma. I fell very confuse.
my code is below:
void dma_done (void* handle, void* data){
dma_complete = 1;
} /* dma_done */
int alt_main (void)
{
alt_dma_txchan tx;
if ( ( tx=alt_dma_txchan_open(DMA_0_NAME)) ==NULL)
{
return;
}
int res;
res=alt_dma_txchan_ioctl(tx, ALT_DMA_SET_MODE_32, NULL);
if(res){
return;
}
res=alt_dma_txchan_ioctl(tx,ALT_DMA_RX_STREAM_ON,(void *)buffer);
if(res){
return;
}
if(alt_dma_txchan_send(tx, (void *)SDRAM_BASE, 160, (alt_txchan_done *)dma_done, NULL)<0)
http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/sad.gif
{
return;
}
while(!dma_complete);
alt_dma_txchan_close(tx);
dma_complete=0;
}
when the dma is final, the buffer only have 20 data, and these data is located in SDRAM_BASE+80;
