nios II implementation problem

[Altera_Forum]

Respected members, 

 I have some doubts on Nios II processors. I am requesting the forum members to clarify my doubt.  When designing NiosII processor system using SOPC builder, there is a on-chip ROM component inside the system. But the problem is that, the design is volatile, ie, when disconnecting the power, and again switching it on, again we need to program the FPGA. So my question is, what's the use of on-chip ROM. because whenever we there is a power off, data will vanish!!!.  please suggest a solution for this.

[Altera_Forum]

Hello nipu_n, 

 You are absolutely right that the on-chip ROM will lost the data after power-down the device. The data will be written into the ROM during config of the FPGA after power-on. So the configuration data holds the ROM data too.  Bye, niosIIuser

[Altera_Forum]

> what's the use of on-chip ROM. 

 There's no write enable ... so it won't get corrupted by code that doesn't play nice. Basically, it's useful for code/data that must remain consistent when a device (re)configuration does not occur (e.g. software reset/watchdog reset) ... otherwise, there's little motivation to use on-chip ROM over on-chip RAM.  > because whenever we there is a power off, data will vanish!  Well ... this is really depends on your point-of-view I guess ... but once the Cyclone/Stratix device is configured the on-chip ROM is available ... if the device isn't configured ... then it really doesn't matter ;-)  Regards, --Scott

[Altera_Forum]

One other reason to select a ROM is in case you plan to move your design to Hardcopy. 

Hardcopy doesn't support initialized RAMs but does support ROMs.

[Altera_Forum]

hi nipu_n, 

 in case your question is more basic: Altera FPGAs are SRAM-based devices, other vendors provide FLASH-based FPGAs. So SRAM-FPGAs looses its content everytime power is removed. Everytime power is connected, the FPGA needs to be configured, that means loaded with your specific design. Because on-chip ROM is part of your design, it is initialized while configuring the device. In a stand-alone application you have to add an extra FLASH-device (e.g. serial FLASH EPCSxx) which is programmed with your design and automatically loads your FPGA after power up (in milliseconds).  Mike

[Altera_Forum]

thank you niosIIuser, smcnutt,James, and MiR for your valuable informations

[Altera_Forum]

i have some more doubts regarding the on-chip components in NIOSII - cyclone; 

 *how can i store some data into on-chip ROM?  * how it is possible to count the number of LEs used by different on-chip components?  am waiting for your valuable responses......

[Altera_Forum]

nipu_n, 

 <div class='quotetop'>QUOTE </div>  --- Quote Start ---  *how can i store some data into on-chip ROM?[/b]  --- Quote End ---    How you populate them depends on your flow. I&#39;ve used both .hex and .mif formats to populate memories in Quartus II.  <div class='quotetop'>QUOTE </div>  --- Quote Start ---  * how it is possible to count the number of LEs used by different on-chip components?[/b]  --- Quote End ---    Quartus II will give you both a post-synthesis and post-compilation report summarizing the resources used. This should give you what you&#39;re looking for.  Cheers,  - slacker

[Altera_Forum]

One little detail about the on-chip ROM&#39;s:  

Its read-only, yes but not when debugging inside nios ide. Somehow the nios IDE is able to load a new pattern into the ROM without reloading the FPGA sof file! Which means there is a write operation taking place.  Someone could maybe explain how this is done. I can only guess.

[Altera_Forum]

nipu_n, 

<div class='quotetop'>QUOTE </div>  --- Quote Start ---  *how can i store some data into on-chip ROM?[/b]  --- Quote End ---   When you create your software with Nios II IDE and use somewhere in your programme that on-chip ROM, the compiler creates a &#39;rom-name.hex&#39; file in your fpga directory, containing the data you&#39;ve defined ( e.g. as &#39;const int rom_data[]&#39; ). SOPC-Builder now adds your data to FPGA configuration data in its next compilation step. ROM, created with &#39;MegaWizard Plug-In Manager&#39; can be initialized by using &#39;Tools->In-System Memory Content Editor&#39;  <div class='quotetop'>QUOTE </div>  --- Quote Start ---  * how it is possible to count the number of LEs used by different on-chip components?[/b]  --- Quote End ---   I don&#39;t know if there is a feature to estimate the amount of LEs, but after compiling you can see it in the hierachy window or in &#39;Compilation Report->Fitter->Resource Section&#39;. The amount of LEs depends on your specific settings for the compilation process.  Mike

[Altera_Forum]

Yes, most on-chip ROMs are writable when the processor is in debug mode. 

 To explain - when Quartus instantiates a ROM it&#39;s normally using M4K blocks but not connecting the write enable. SOPC builder ROMs have the write enable connected, but gated by a signal which the processor outputs when in debug mode.  This is safe, as when the processor is in debug mode its running a debug monitor supplied by nios2-gdb-server. This monitor can be used to write code into the ROMs if you change it from within the IDE to save you from having to download a new SOF.  Next time you synthesise the design Quartus will pick up the most recent output from the IDE and put that into your SOF file.

[Altera_Forum]

Thank you Slacker, Larsen, Mike and Wombat for your valuable suggestons. 

 I have a C-code for the 8051 microcontroller simulation. Whether can i implement it in NIOS II? If possible, how?  Please give some valuable informations....

[Altera_Forum]

I forget what 8051 code looks like, however the porting of the C code will mainly require changes to how you access peripherals, and whether or not your code was very dependent on what was previously available. So my answer is yes, but depending on the code it could be a simple or complex job. If the 8051 was memory mapped I/O (can&#39;t remember myself) then the port will not be too bad, and if this is not the case then some re-structuring may be needed (again it really depends on the code to be ported). 

 What does the 8051 in the system do? Also you may find that you just want to port the functionality and redo the code (might be more efficient the 2nd time around).

[Altera_Forum]

thank you BadOmen for ur suggestion. 

 i haven&#39;t gone thru the code for 8051. after going thru, i&#39;ll send details  thank you