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Hi, I have met a problem that the soc stopped at starting kernel ......
here is my message U-Boot SPL 2013.01.01 (Jul 09 2015 - 09:16:54) BOARD : Altera SOCFPGA Cyclone V Board CLOCK: EOSC1 clock 25000 KHz CLOCK: EOSC2 clock 25000 KHz CLOCK: F2S_SDR_REF clock 0 KHz CLOCK: F2S_PER_REF clock 0 KHz CLOCK: MPU clock 800 MHz CLOCK: DDR clock 400 MHz CLOCK: UART clock 100000 KHz CLOCK: MMC clock 50000 KHz CLOCK: QSPI clock 400000 KHz INFO : Watchdog enabled SDRAM: Initializing MMR registers SDRAM: Calibrating PHY SEQ.C: Preparing to start memory calibration SEQ.C: CALIBRATION PASSED SDRAM: 512 MiB ALTERA DWMMC: 0 U-Boot 2013.01.01 (Jul 09 2015 - 09:20:51) CPU : Altera SOCFPGA Platform BOARD : Altera SOCFPGA Cyclone V Board I2C: ready DRAM: 512 MiB MMC: ALTERA DWMMC: 0 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Skipped ethaddr assignment due to invalid EMAC address in EEPROM Net: mii0 Warning: failed to set MAC address Hit any key to stop autoboot: 0 reading u-boot.scr ** Unable to read file u-boot.scr ** Optional boot script not found. Continuing to boot normally reading zImage Invalid FAT entry 3194880 bytes read in 341 ms (8.9 MiB/s) reading socfpga.dtb 20633 bytes read in 7 ms (2.8 MiB/s)# # Flattened Device Tree blob at 00000100 Booting using the fdt blob at 0x00000100 Loading Device Tree to 03ff7000, end 03fff098 ... OK WARNING: could not create /chosen FDT_ERR_BADSTRUCTURE. WARNING: could not create /memory: FDT_ERR_BADSTRUCTURE. fdt_initrd: FDT_ERR_BADSTRUCTURE Starting kernel ... it seems there is something wrong with the fdt, but i know little about linux, dose anyone have met the similar problem or can help me thanksLink Copied
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