Enquiries on IOMT PCIe and IMMA DDR margin test

[alexliewkh]

Hi Intel,

I have some questions on the test matrix and test resuilts sample size of IOMT PCIe and IMMA DDR.

As stated in Intel's documents, IOMT PCIe is required to have minimum sample size of 2(boards) x 5(repetition), however, in IMMA DDR, 2(boards) x 5(shift) x 3(repetition) is required.

Why are the DIMM needed to shift in DDR margin test? Why does 2x5x3 is not required in IOMT PCIe margin test, where we change the PCIe add-in card?

Why 30 sample size of test results are required in IMMA while only 10 sample size of test results are required in IOMT?

[Esteban_D_Intel]

Hello alexliewkh,

Thank you for posting on the Intel® communities.  

To better assist you, I would appreciate if you could confirm the following:

• Are you a developer?
• Are you working on your own design?

Esteban D.

Intel Technical Support Technician  

[alexliewkh]

Hi Esteban,

Yes, I'm the developer, EA engineer. Currently working on Whitley and Eagle Stream platform. I'm trying to understand the theory behind the 2x5 and 2x5x3 test matrix define in the Intel's documents.

[Esteban_D_Intel]

Hello alexliewkh,

Thank you for your response.

To better assist you, we recommend that you submit your question on the Intel® Developer Zone.  

Please register, and create an account so that you can receive further troubleshooting support, and get access to useful documentation.  

Intel® Developer Zone - Contact Page  

https://software.intel.com/en-us/support  

I hope this helps you to get the appropriate support.

If you need any additional information, please submit a new question as this thread will no longer being monitored  

Esteban D.  

Intel Technical Support Technician