Inter-Processor Interrupts / Destination Mode: Logical

[osmanyagci]

Hi,

I am trying to send IPI' s in logical destination mode but it always sends the interrupt to the "running core". For example, my program is running on core 0 and I want to send IPI' s to core 1 and core 2 but it sends the interrupt to core 0 always.

The configurations I made;

I have configured DFR register (offset 0xE0) "Model" field to flat mode.

I have configured LDR register (offset 0xD0) "Logical APIC ID" field to 0xFF.

I have configured ICR (bits 32-63) to (core id << 24); ( for the above example core id = 0x6)

I have configured ICR (bits 0-31) to (0x483c);

After this configurations, I poll Delivery Status bit so that operation finishes.

I have tried it on tr-b12 board and qemu-x86 but I get the same result described above.

I have no problem in physical destination mode.

What more should I do so that it works properly?

Thanks in advance.

[osmanyagci]

I have solved the problem myself. 

The problem is that I was not configuring LDR register correctly. It should be updated per core!

Example;

    For core 0: Logical APIC ID field in LDR should be 0x1

    For core 1: Logical APIC ID field in LDR should be 0x2

    For core 2: Logical APIC ID field in LDR should be 0x4

    For core 3: Logical APIC ID field in LDR should be 0x8

Then IPI can be sent to each core by setting MDA field properly. In my case, to send interrupt to core 2 and core 3, MDA field should be 0x6.

[Meghak]

Hi osmanyagci,

Thank you for posting on Intel Community.

Please note since you confirmed the issue is resolved, we will be closing this request.

Please don't hesitate to ask any further questions in the future.

Feel free to start a new conversation, as this thread will no longer be monitored.

Regards,

Megha K