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I am running Windows 10 64 bit Home edition, with **8 Gigabytes of DDR3 RAM**, successfully, which is in fact not what brings me here. I am trying to do some research around Java OpenJDK floating point maths, and I am now curious about the hardware and how it applies.

**My CPU is an intel Core i3 2120. **I have run CPU-Z successfully here, and it tells me that I have a CPU codename of

**Sandy Bridge**. My questions pertain to the floating point unit, the Math Co-processor.

In Java, float is a 32 bit floating point number. double is a 64 bit floating point number.

**1)** I had thought that these numbers were written and dealt with entirely inside the floating point unit of my 'Sandy Bridge' CPU. Is this true, or is general Random Access Memory used too?

**2)** How many 32 bit registries and 64 bit registries exist for Java, inside 'Sandy Bridge' or 8 Gigabytes of RAM? Can java reuse one 64 bit registry as two 32 bit ones?

**3)** CPU-Z, in the instructions entry, tells me that my 'Sandy Bridge' has the following instructions:

**MMX, SSE, SSE2, SSE3, SSE4.1, SSE4.2, EM64T, VT-x,AVX.**

I have been lead to believe that versions of SSE and beyond provide some extra mathematical binary data bits for assistance for range-limited, decimal point numbers, so that when on the right hand side of the binary number, when the 32 or 64 bit registry number runs out, as a result of base 10 arithmetic to binary, that information straddling the end of the registry is given more binary space, so that the last decimal digit in the range never gets pronormal or denormal values, due to discrepencies in concluding the binary pre representation for the decimal digits.

Does SSE, and of my listed hardware instruction set here, include these post 32 bit and post 64 bit registries? If so, does that phenomenon exist inside a 'Sandy Bridge' processor?

**4)** For Java OpenJDK, how many 32 bit and 64 bit number registries will my 'Sandy Bridge' system have available?

**5)** Are there extra SSE (or equivalent) extra bits after the end of absolutely all of these registries, in a 'Sandy Bridge' chip? How does it work?

**6)** How many bits are inside extra SSE bits (or equivalent) for a 'Sandy Bridge' chip, presuming that extra bits past the end of 32 and 64 bit registers are of uniform length? How many are the extra bits, and if that varies, why?

- Tags:
- bits
- floating point
- Floating Point Arithmetic
- Floating Point Errors
- java
- OpenJDK
- Register
- registers
- registries
- registry
- SSE

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Hello SM-1234,

Thank you for posting on the Intel® communities.

Due to this product being discontinued, Intel Customer Service no longer supports inquiries for the __Intel® Core™ i3-2120 Processor__, but perhaps fellow community members have the knowledge to jump in and help. You may also find the Discontinued Products website helpful to address your request. Thank you for understanding.

Discontinued Products:

Intel® Core™ i3-2120 Processor:

Please keep in mind that this thread will no longer be monitored by Intel.

Regards,

Deivid A.

Intel Customer Support Technician

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Forget my own out-of-support CPU processor, then, and presume some hypothetical, most "up-to-date" **64 bit one**, that intel knows most Desktop Windows PC's most have, as of now, 2022, can that be picked and reapplied to the same questions.

**1)** I had thought that floating point binary digits are written and dealt with entirely inside the **floating point unit** of the 'Modern CPU'. Is this true, or is general **RAM** used too? What hardware is usually used for floating point arithmetic operations, data writing and reading?

**2)** Are there extra SSE (or equivalent) bits after the end of absolutely all floating point registries, in a the 'Modern CPU'? If not, how does the number registry/"extra registry" arrangement generally work?

**3)** How many 32 bit and 64 bit number floating point registries does the the 'Modern CPU' 64 bit system have available?

**4)** Are all of those 32 and 64 bit registries available to Java? Can Java reuse one 64 bit registry as two 32 bit ones, or not?

*The CPU-Z program, in the instructions entry, tells me that my the 'Modern CPU' happens to have the following instructions:*

**MMX, SSE, SSE2, SSE3, SSE4.1, SSE4.2, EM64T, VT-x,AVX.**

*I have been lead to believe that versions of SSE and beyond provide some extra mathematical binary data bits for assistance for range-limited, decimal point numbers, so that when on the right hand side of the binary number, when the 32 or 64 bit registry number runs out, as a result of base 10 arithmetic to binary, that information straddling the end of the registry is given more binary space, so that the last decimal digit in the range never gets pronormal or denormal degrading values, due to discrepencies in concluding the binary pre representation for the decimal digits, due to the use formula:*

(-1)^{s}× m × 2^{(e - 127)}

**5)** How many bits are inside each extra SSE bit registry for the 'Modern CPU', presuming that extra bits past the end of 32 and 64 bit registers are of uniform length? Is this number of bits constant or not, and if that varies, to what bit extent, and why?

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