10M16SAU169A7G ADC IO Restriction

[MN23]

When using the 10M16SAU169A7G with the ADC feature, it looks like IOs in bank 1A and 1B cannot be used. Just to confirm, can the JTAG feature in 1B still be used? Also, where can we find information on how many IOs can be used in bank 8 when the ADC feature is enabled? There looks to be only information for the F484  and E144 package. 

[cfkd]

Hi Michael,

Thank you for your question.

Yes, JTAG feature in B1 can be used.

To find out the I/O information in bank 8, kindly refer to the corresponding Pin-Out file (XLS) from this page:

https://www.intel.com/content/www/us/en/support/programmable/support-resources/devices/lit-dp.html#tab-blade-1-4

Best regards,

Chee

[cfkd]

Hi Michael,

As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

Best regards,

Chee

[MN23]

Hi Chee,

That pinout file does not indicate how many IOs in percentage (%) in Bank 8 can be used when the ADC feature is being used. I'm looking for something similar to table 7 and 8 in this document:

https://www.intel.com/content/www/us/en/docs/programmable/683572/current/guidelines-analog-to-digital-converter.html