07-20-2018 06:16 AM
Hi ,I am connecting a master whose data width is 128 bit. I am connecting it to a slave whose data width is 32 bit. Master output is Avalon interface When I trigger a data from the master, it is triggering 4 writes on slave.(32*4 =128).But that will overwrite the data in the next address. How do I tell my interconnect to consider only LSB 32 bit? Is there any setting that can be modified?
07-21-2018 06:05 AM
--- Quote Start --- You can use the byteenable signal thats part of the Avalon standard to mask certain bytes. --- Quote End --- My master is a pcie hard IP configured as G3x4 128bit 250 MHz. You mean I have to manually hack the interconnect file generated by Qsys between the pcie(rxm port) and my apb slave??