I am trying to make a feedback loop by FPGA to control output of a device. The device output waveform is a kind of special, Similar to square but not perfectly square (Rise time is fast therefore bandwidth is high) frequency is 100 Hz and duty cycle 80 ns. It means every 10 ms there is 80 ns pulse.
I was using the DE0-Nano but the ADC sampling rate was too slow, 200 KSPS. Based on Nyquist frequency theorem I have to use high speed ADCs.
I tried to use Terasic AD/DA card but faced with many problems. As terasic is not helpful for people who are working with VHDL language and also they said this AD/DA card doesn't work with 1 Mhz lower frequencies.
ADC34j22 EVM and AD9750 are being considered by me for doing this AD conversion, What is your idea? Has anybody worked with these two? Hope for your instructions about this two or any other suggestions.
I am attaching my waveform here.
Thanks in advance for any instructions, suggestions.
