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AGILEX Per pin package RLC data

emrahener
Beginner
457 Views

Hi,

I want to generate ibis file  for my FPGA design and fooling the procedure described in :

 

https://community.intel.com/t5/FPGA-Wiki/Generating-an-Agilex-per-pin-RLC-IBIS-ibs-file/ta-p/1342589

 

I need Package specific Per pin package RLC data for AGIB027R31B2E2V. Not the ones given in 

https://www.intel.com/content/www/us/en/support/programmable/support-resources/board-layout/ibs-ibis-index.html

 

I am getting the following error when I run the script :

 

C:\Projects\NEST\Local\QuartusDesigns\DDRExmplForImp\qii> quartus_sh.exe -t Gen_agilex_pin_ibis.tcl ed_synth agilex-pkg-rlc.xlsx
Info: *******************************************************************
Info: Running Quartus Prime Shell
Info: Version 22.1.0 Build 174 03/30/2022 SC Pro Edition
Info: Copyright (C) 2022 Intel Corporation. All rights reserved.
Info: Your use of Intel Corporation's design tools, logic functions
Info: and other software and tools, and any partner logic
Info: functions, and any output files from any of the foregoing
Info: (including device programming or simulation files), and any
Info: associated documentation or information are expressly subject
Info: to the terms and conditions of the Intel Program License
Info: Subscription Agreement, the Intel Quartus Prime License Agreement,
Info: the Intel FPGA IP License Agreement, or other applicable license
Info: agreement, including, without limitation, that your use is for
Info: the sole purpose of programming logic devices manufactured by
Info: Intel and sold by Intel or its authorized distributors. Please
Info: refer to the applicable agreement for further details, at
Info: https://fpgasoftware.intel.com/eula.
Info: Processing started: Tue Nov 1 15:14:28 2022
Info: System process ID: 14812
Info: Command: quartus_sh -t Gen_agilex_pin_ibis.tcl ed_synth agilex-pkg-rlc.xlsx
Info: Quartus(args): ed_synth agilex-pkg-rlc.xlsx
Processing ed_synth.pin file and cross referencing to the agilex-pkg-rlc.xlsx file
Error (23035): Tcl error: can't read "package_Rtyp": no such variable
while executing
"format "%-*s %-*s %-*s %-*s" 17 "R_pkg" 20 $package_Rtyp 20 $package_Rmin 20 $package_Rmax"
("foreach" body line 49)
invoked from within
"foreach line $lines {
set first_txt [lindex $line 0]
# First find part number
if {$pinlist_area == 0} {
if {$first_txt == "CHIP"} {
..."
(file "Gen_agilex_pin_ibis.tcl" line 172)
------------------------------------------------
can't read "package_Rtyp": no such variable
while executing
"format "%-*s %-*s %-*s %-*s" 17 "R_pkg" 20 $package_Rtyp 20 $package_Rmin 20 $package_Rmax"
("foreach" body line 49)
invoked from within
"foreach line $lines {
set first_txt [lindex $line 0]
# First find part number
if {$pinlist_area == 0} {
if {$first_txt == "CHIP"} {
..."
(file "Gen_agilex_pin_ibis.tcl" line 172)
------------------------------------------------
Error (23031): Evaluation of Tcl script Gen_agilex_pin_ibis.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 2 errors, 0 warnings
Error: Peak virtual memory: 167 megabytes
Error: Processing ended: Tue Nov 1 15:14:28 2022
Error: Elapsed time: 00:00:00
Error: System process ID: 14812

 

 

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5 Replies
AqidAyman_Intel
Employee
421 Views

Hi,


Thank you for reaching out to Intel FPGA Community.

I have sent the requested file via email. Kindly check your inbox and confirm if you have received it.


Regards,

Aqid


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emrahener
Beginner
393 Views

Hi Aqid,

The RLC file solved the issue with the script. Thanks for your help.

Regards,

Emrah

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AqidAyman_Intel
Employee
383 Views

Hi Emrah,


I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions.


Regards,

Aqid


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emrahener
Beginner
370 Views

 

When I try to use the generated ibis file in Cadence  Sigrity tool It does not accept the generated ibis file. I used ibischk7 from

https://ibis.org/ibischk7 and the it also could not validate the generated ibis file. I am sending the ibischk7  output ibischeckerr.txt .

The command I am using are in Command.txt

I am attaching all files used in the process.

 

Kind Regards

Emrah ENER

 

 

 

 

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emrahener
Beginner
341 Views

Do you have any update on this ticket ?

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