ALPLL mif flie update on the fly?

[Altera_Forum]

Hi. Is there any way I can update an ALPLL Megafunction initialization (mif) file by using the "Update Memeory Initialization File" option of the Quartus II software? I am trying to update the PLL settings "on the fly" without using the ALPLL_RECONFIG Megafunction (the mif file of which IS updated by the above option ). 

   ty

[Altera_Forum]

I do not get the question exactly but ... 

*I guess you want to change plle settings and regenerate a programming file without recompiling? Try ECO change. * if you really want to change pll settings while the fpga is up and running, you need manipulate the pll using the reconfig pins that can be enabled in the alt pll function. These pins manipulate the the actual pll settings that are stored in a serial configuration chain. It is not regular a memory block and therefore you cannot update it on the fly using the regular method. There are quite some application notes about this topic. I can warn you though: manipulating pll's on the fly gets quickly quite complicated...

[Altera_Forum]

hi jvov and thank you for your reply. 

  I have already successfully tested (simulated) altpll along with altpll_reconfig. My problem is that altpll_reconfig uses some memory bits (144 I think) that the fitter implements as a whole M9K block (I use EP3C16Q249C8). Due to my design memory requirements I need to get rid of that extra memory block, so I m trying to avoid using altpll_reconfig if possible.   Now, because altpll uses a mif file during reconfiguration just like altpll_reconfig does, I thought maybe I could just use "Update Memory Initialization" option at the Quartus along with Assembler to update that mif file without having to run the whole compilation process. The thing is, that when I update mif files, only the one that initiates altpll_reconfig is updated and not that of the alt_pll. I must admit that the term "on the fly" doesn't really describe the function I want to achieve here.

[Altera_Forum]

Hi, 

 As you discovered: changing the MIF is not changing the actual pll. I used ECO changes to do this:   1) compile design once  2) go to chip planner and go to the pll: then change the pll settings  3) open the cange manager window (menu-->view --> utility windows) and commit changes  Note: you can export your changes to a tcl script (in the change manager window rigth click)  Suucess!