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ALT_INBUF_DIFF in cycloneII

Altera_Forum
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is possible in cycloneII device use 2 pins INPUT for differential rs422 signal? 

In quartus2 the differential buffer for cyclone2 is not allowed!
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Altera_Forum
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You may not connect RS422 directly to an FPGA. Even if a differential buffer would exist. RS422 inputs need to have a common mode range of +/- 10V. 

So before interfacing to your FPGA, use a RS422 differential line receiver. 

 

Regards, Ton
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Altera_Forum
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hi std_logic_vector! 

RS422 is not RS232. 

It is a differential line (2 wires + ground) at level 0-3.3V. 

it is compatible with ecl differential levels, but cycloneII has only dedicated pin for this function. 

I can use the lvds standard on fpga, but it works at 2.5Volt, and i use in this bank register 3 pins at lvcmos level as output (3.3 volt). 

 

regards
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Altera_Forum
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Hi Thielam, 

 

I know the difference between RS232 and RS422. I also know that RS422 is not 0 to 3V3.  

Maybe you should read: http://www.bb-elec.com/bb-elec/literature/tech/485appnote.pdf 

It gives you all the information differential signaling, voltage levels, common mode, grounding, and so on. 

 

One things is for sure: You should not connect RS422 directly to your FPGA. 

 

Success, Ton
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Altera_Forum
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hi Ton... 

in my case it is a "modified" rs422. 

it works at 0-3.3Volt. see max13433 http://datasheets.maxim-ic.com/en/ds/max13430e-max13433e.pdf 

 

can lvds pin work at 3.3 volt?
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Altera_Forum
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--- Quote Start ---  

 

in my case it is a "modified" rs422. 

 

can lvds pin work at 3.3 volt? 

--- Quote End ---  

 

 

 

"modified" RS422, that explains it all :-) 

 

Quartus will give an error if you set Vccio to 3V3 and select LVDS as I/O standard.  

I don't know what happens when you set Vccio to 2V5 in Quartus, but supply your bank with 3V3.  

I guess there's a big chance LVDS will work, at least with your "modified" RS422.  

But you don't get any guarantee from my side. 

If you going to try it, please post the result. 

 

Good luck, Ton
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Altera_Forum
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ok.. i try it! 

the vccio is connected at 3.3V power supply.. 

in quartus2 i set 2 pins in lvds mode.. 

all other pins will be set to 2.5V (for delete fitter error in compilation). 

 

if i set other out-pins at 2.5V, but i connect vccio at 3,3V, can i demage the device? 

 

 

------------------ 

"I don't know what happens when you set Vccio to 2V5 " 

 

can i set in quartus the value of Vccio power? where? 

 

 

best regards
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Altera_Forum
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I don't think you will damage the device. But like I said before: no guarantee. 

 

Vccio can be set in de pin planner. Make sure the banks are visible with View >> show >> show I/O banks (there's also a pictogram for it). 

If you double-click the I/O bank rectangle you'll get the I/O bank proporties. 

 

Success, Ton
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Altera_Forum
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ok!! i can now set the vccio value on quartus2. 

 

for you,setting the VCCIO to 2.5 volts(in quartus), but connecting it to 3.3 volts power, the outputs pins (set as 2.5 volts in quartus) will reach the high level of 3.3 volts? 

 

regards
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Altera_Forum
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--- Quote Start ---  

ok!! i can now set the vccio value on quartus2. 

 

for you,setting the VCCIO to 2.5 volts(in quartus), but connecting it to 3.3 volts power, the outputs pins (set as 2.5 volts in quartus) will reach the high level of 3.3 volts? 

 

regards 

--- Quote End ---  

 

 

I'm not sure, but I suppose so. 

There's only one way to be sure and that trying it. 

 

Good luck, Ton
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Altera_Forum
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Yes, the LVCMOS/LVTTL pins should reach the high level for 3.3V if you power the bank with 3.3V but tell Quartus you're using 2.5V. 

 

That said, I have the strong feeling that setting pins to LVDS and powering the bank at 3.3V won't do what you need. 

 

You really need to take a look at how your "modified" RS-422 looks at the electrical level and how LVDS looks like at the electrical level.
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Altera_Forum
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--- Quote Start ---  

That said, I have the strong feeling that setting pins to LVDS and powering the bank at 3.3V won't do what you need. 

--- Quote End ---  

 

Very simply, operation of the Cyclone II LVDS receivers isn't specified with 3.3V VCCIO, considering type and temperature variations. But I guess, it will work, at least in the RS422 speed range, though. As said, it's common mode range can't compete with true LVDS receivers and you have to care about keeping the maximum input voltage. I think, it can be an option for on-board communication, a single ended input would do in this situation, too.
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Altera_Forum
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ok.. tnx to all. 

monday i can try this configuration and see if it works. 

regards, Luca 

 

p.s. the lvds standard use 2 wires (plus and minius) . but do the reference 3° wire is neccessary (ground)?
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