ALTIOBUF dynamic delay, MEMORY_INTERFACE_DATA_PIN_GROUP, pin sans memory interface

[Altera_Forum]

Hi, 

 I am using the dynamic delay, operationally modified IO pin delay, feature of ALTIOBUF and the documentation indicates that I must set the MEMORY_INTERFACE_DATA_PIN_GROUP assignment. This works when the IO pin is within a memory interface pin group, but I receive a fitter error when the IO pin is outside of a memory interface pin group, no matter if I use this option setting up a single pin group or not. My understanding is that all Stratix IV IOE support the dynamic delay feature, and that every Stratix IV IO pin is interfaced via an IOE.  Does anyone know how to a get a fit for ALTIOBUF in dynamic delay mode when it is interfacing a Stratix IV, sans-memory-interface, IO pin in dynamic delay mode?  Am I incorrect in concluding that all Stratix IV pins are interfaced with an IOE supporting dynamic delay?  I use Quartus 13.1 at a very recent service pack.  Thanks,  Jeff

[Altera_Forum]

PS: I experience this problem when the pin is an LVDS mode input into the FPGA.

[Altera_Forum]

Response from Altera Technical Support: 

 For your information, the dynamic delay chains are only available on I/O pins where the special function is labeled as “DQ/DQS”. There is a solution published as below: https://www.altera.com/support/support-resources/knowledge-base/solutions/rd04212011_682.html