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Honored Contributor I

ARRIA10 Transceivers issue : one channel afflicts the other..

Hi to everyone. I'm testing a design strictly derived from A10GX_Devkit_Superlite_V2_1_lane_2500Mbps reference design. 


- I'm using 5,25 Gbps on 2 GX channels , PHY on Basic/Enhanced and 2 reset controllers (as per original design) for Tx and Rx  


- CDR clock is 125 Mhz, tx/rx pma dividers are set to 33. Ok, it runs fine, toolkit says me that two channels are both greens, no errors. (I'm testing the HW with a loop external tap on SFP I/O interfaces CH1 and CH0) 


-BUT when I disconnect HW loop tap on CH0, CH1 it's afflicts from loss of sync ... and vice-versa!! Channels seems to be "dependent".. It's possible??????  


- On same hardware, when I use another reference design to test ... it seems OK.. It is possible to "fit" a inter-channel dependance only making a design???  


DO you any meet similar issue? 


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Honored Contributor I

Are you still transmitting data on the channel that you disconnect? If so, remember that you've basically just created an antenna so will get some weird behavior. Also, this sort of thing ends up being more of a board design issue than an FPGA issue...