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Hi altera expert,
I have 2 question regarding the ATX PLL. 1) We can not use whatever frequencies we want when using the the ATX PLL due to the frequency hole. My question is why this range of frequencies can not be used? What cause this frequency hole? Is there any good explanation? 2) Altera handbook state that ATX PLL will have better jitter performance compare to CMU. My question is why? Thanks and regards, sysysyLink Copied
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I think i got the answer already...
Thanks anyway....![](/skins/images/54BF544B471F3F61DFD338F1D58F9426/responsive_peak/images/icon_anonymous_message.png)
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