I've written code that will enable me to program an EPCS** device attached to a FPGA.I'm using the ALTASMI_PARALLEL megafunction to access and program an EPCS16. The code works fine but rather than use IO pins I'd like to be able to use the JTAG pins to do this. In effect I want to write my own version of the Altera Serial Flash Loader since the protocol (over USB ) for using this is not published. Using the Virtual JTAG Megafunction I can expose the JTAG pins as follows: wire TDO, TDI, TMS, TCK; VJTAG VJTAG_inst (.tdo(TDO), .tdi(TDI), .tms(TMS), .tck(TCK)); I can then access and use TDI, TMS and TCK as inputs which work just fine in my application. However, I can't get TDO to work as an output. Can someone please explain how this is done. Thanks
I don't exactly understand, what you are trying to achieve.The VJTAG MegaFunction doesn't give access to the JTAG pins rather than to the nodes of the virtual JTAG hub, as discussed in the VJTAG user manual. TDO output is only routed according to the state of the virtual JTAG state machine, during an active VIR/VDR scan.I agree, that it would be good to have more virtual JTAG details documented by Altera, e.g. the operation of VJTAG instance types used by Quartus as SFL and SFL enhanced, or the sld_hapi software interface. The SFL operation is rather low level, directly shifting data in and out of the serial flash, as far as I remember. You should be able to extract the VJTAG codes from the alt_sfl.vhd respectively alt_sfl_enhanced.vhd code in quartus/libraries/megafunctions.
Thanks for your reply. Basically I want to be able to program an EPCS** connected to a Cyclone FPGA via its JTAG interface. I can do this now if I use the SFL Megafunction and Altera PC tools.However, I need to use my own PC software and hence need a replacement for the SFL or a desciption of the protocol that if uses.
Yes, your intention has been clear so far. I was mainly wondering what you exacty did when you stated:--- Quote Start --- I can't get TDO to work as an output --- Quote End --- As far as I'm aware of, the generic VJTAG block is working fine. But it has to be operated with the respective JTAG codes to get a response. I agree, that it would be a straightforward way for many production and maintenance purposes to operate the Altera supplied SFL or SFL enhanced MegaFunction by your PC application. At present, there are two parts missing: - a documentation of the low level SFL protocol - an interface to the Altera JTAG stack in another way than tcl scripting I already mentioned, that the first point can be basically solved by analyzing the alt_sfl.vhd code. Personally, I didn't need it yet. Because the VJTAG protocol has been disclosed with the V2.0 user manual (and previously in an Altera patent, by the way), you are at least able to operate it over a third party JTAG interface. For the Altera JTAG adapters and the respective software interface, tcl scripting is the only supported access method up to now. For the JTAG UART, there's also a dll interface. sld_hapi.dll is an existing unsupported interface to the JTAG stack. If you are able to guess the purpose of it's exported functions, you can control it.