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Agilex 7 interface with DDR4

nelky
Beginner
8,980 Views
Hi experts,
I am using Agilex 7 (AGFB022R25A2I3V). I wish to use the internal bridges to write to and read from DDR4.

My idea is like this,...
Build a internal connections using Platform Designer in Quartus Prime Pro. Then generate the Avalon-mm addresses of the DDR4.

At the Linux driver / application code, we write C program to write to and read from the specific address of the DDR4.

Do you know where I can find such sample project? I have been trying to search for months yet still can't find it. I have gone through a lot of intel documents and video clips. Yet still they can't help.

I am still not successful in implementing my requirement.

Could you please help?

Regards
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nelky
Beginner
2,464 Views

Hi sstrell,

If you look at this video clip, starting at minute 30.49

https://www.youtube.com/watch?v=IKeK5-mLGks

it is telling to use External Memory Interfaces for HPS Intel Agilex FPGA IP in order to incorporate with HPS.  

My query here is that what has it got to do with our stand-alone EMIF we created based on the document ug-ag-emideug-683162-773463.pdf?

 

So the stand-alome EMIF has no use at all.  Correct me if I am wrong.

 

This is confusing to me.  

 

Like you mentioned before, we need to create and test the stand-alone EMIF before incorporating it to HPS.   But why do we need to do that if we have the External Memory Interfaces for HPS Intel Agilex FPGA IP, which has the hps_to_emif pin to be connected to the hps_to_emif pin at the HPS.  The stand-alone EMIF doesn't have this pin.  How can it be connected to the HPS?

 

Is our direction wrong here?

 

This is what confused me all this while.

 

Please help.

 

Regards

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sstrell
Honored Contributor III
2,450 Views

I will explain this again.  The goal is to break down building your design.  Create a standalone EMIF design that uses the same I/O banks as will be used when you connect it to the HPS.  This way, you can get the EMIF working first, for now controlled by soft FPGA logic.  Then, you switch over to using the HPS EMIF IP which will use the same I/O banks and I/O pins and be controlled by the HPS.

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nelky
Beginner
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Hi sstrell,

Thanks for coming back to me.

 

I attach the pin assignment here.  It is from the stand-alone EMIF project.

 

Could you please tell me for those pins that are not connected, what should they be connected to.

We do it step-by-step based on your recommendation.  Now we complete the pin assignment first.

 

When I compiled it, I got the attached errors and warnings.

 

By the way, after this, how to test to make sure the stand-alone EMIF is working.  Like in the few posts back, I mentioned that I am stuck at the EMIF Debug Toolkit.

 

Regards,

 

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JingyangTeh_Altera
2,339 Views

Hi

 

You could luanch the emif debug toolkit from the quartus tool.

Seen below:

 

2024-03-14_09h21_03.png

Regards

Jingyang, Teh

 

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nelky
Beginner
2,323 Views

Hi Jingyang,

Thanks for coming back.

Before I posted, I have tried the method you suggested.  It can't be used since I am using Agilex, not Stratix, Arria or Cyclone.  Please refer to the attached image for the error.

I have to use the System Console.  But it was stuck and don't know how to proceed (you can see the attached image).  I did mention about this in my previous post.

 

Regards

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JingyangTeh_Altera
2,125 Views

Hi


Just updating the case for the SystemConsole launching the EMIF Tool kit


Please refer to the link on adding the EMIF toolkit to the project.

https://www.intel.com/content/www/us/en/docs/programmable/683216/23-2-2-7-1/generating-a-design-example-with-the.html

After adding it to the project you could launch using the method:

11.7.3. Launching the EMIF Debug Toolkit (intel.com)


Regards

Jingyang, Teh


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JingyangTeh_Altera
1,929 Views

Hi


Since a solution have been provided and no feedback was received, I shall set this thread to close pending. If you still need further assistance, you are welcome to reopen this thread within 20days or open a new thread, some one will be right with you. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


If you happened to close this thread you might receive a survey. If you think you would rank your support experience less than 4 out of 10, please allow me to correct it before closing or if the problem can’t be corrected, please let me know the cause so that I may improve your future service experience.


Regards

Jingyang, Teh


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