Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Altera CPLD Max V (P/N: 5M2210ZF256C4)

user153746
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I am supplying this CPLD from two separate power rails (A 1.8V rail and a 3.3V rail). The CPLD uses 1.8V for VCCI02 through VCCI04, and uses the 3.3V rail for VCCI01. The 1.8V rail starts up in about 1ms, and the 3.3V rail starts up in about 20-40ms. Will the component have issues since the two supplies are not coming up to voltage simultaneously?

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AminT_Intel
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Hello,


I see that you have already posted similar forum thread: https://community.intel.com/t5/Programmable-Devices/Altera-CPLD-Max-V-P-N-5M40ZE64C4/m-p/1386724#M85027


I think you can continue there since the answer will be similar.


Thank you


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