Altera DE2 SDRAM Contoller

[Altera_Forum]

Hi; 

 I have confusion about sdram controller. I use Altera DE 2 board with Cyclone II and I want to use the external memory, sdram (8MB) to store image. As I know, we can use SOPC builder with Nios to make the sdram controller and I have try it by follow the steps in Using the SDRAM Memory on Altera's DE2 Board with VHDL Design document. But, to running the application program I need to write required program in NIOS ii Assembly language or in c. Is it this is the rules when we use SOPC builder? Can I use VHDL to run the application program after make the SOPC setting for sdram?  Anyone please told me the right way..:confused:thank you

[Altera_Forum]

What's the problem with sdram? If you correctly configured the sdram controller in sopc builder you use it in Nios application code like any other memory. 

Did you read the sopc builder tutorial? I think it includes sdram and this will guide you step by step from scratch to a simple working system.

[Altera_Forum]

Hi Cris72, 

 Yes, I understand the step of sopc builder and I have done it. I'm stuck at the last step,where need to make another program in c language for running the nios. I not familiar with c and I try to avoid it.  My question is can I just running the nios using vhdl code? My main program is to process pixels that stored in sdram in vhdl. Thanks for reply

[Altera_Forum]

VHDL is a HDL (Hardware Description Language): it is intended to describe digital circuits which Quartus will eventually synthesize into fpga. Nios is part of these circuits, together with all sopc builder stuff and external logic. Anyway, after the fpga configuration, Nios is actually a 'real' microprocessor, so you are supposed to program it with a sequential language: C, assembler or whatever the dev tools provide. You can't program Nios with VHDL. Although both VHDL and C can virtually be used to perform the same operation, they apply to two different worlds and behave very differently.

[Altera_Forum]

--- Quote Start ---  Anyway, after the fpga configuration, Nios is actually a 'real' microprocessor, so you are supposed to program it with a sequential language: C, assembler or whatever the dev tools provide. You can't program Nios with VHDL. Although both VHDL and C can virtually be used to perform the same operation, they apply to two different worlds and behave very differently.  --- Quote End ---    Hi Cris72,  Okay, so now I need to program the nios (sdram controller) with c language. Then, my main program (some mathematical operation to the pixels) is write in vhdl. How can I connect the nios (sdram controller) with the main program (vhdl)? I can't figure it out..I'm new with nios,please advise me.

[Altera_Forum]

There are different solutions, but I think all of them are not easy for a beginner. 

1. Write your pixel elaboration algorythm in C and use Nios 2. Implement an Avalon MM master in your VHDL module, so you can directly access sdram; but this makes Nios pointless 3. Wrap your vhdl code into a Nios custom instruction 4. Use Nios to transfer data to vhdl module (possibly using dma) and then get it after it has been elaborated. In this case you must provide an Avalon slave MM or ST interface to your vhdl module.  The first one is the easiest, but from what you said I guess you don't want to use it.

[Altera_Forum]

--- Quote Start ---  There are different solutions, but I think all of them are not easy for a beginner. 1. Write your pixel elaboration algorythm in C and use Nios 2. Implement an Avalon MM master in your VHDL module, so you can directly access sdram; but this makes Nios pointless 3. Wrap your vhdl code into a Nios custom instruction 4. Use Nios to transfer data to vhdl module (possibly using dma) and then get it after it has been elaborated. In this case you must provide an Avalon slave MM or ST interface to your vhdl module.  The first one is the easiest, but from what you said I guess you don't want to use it.  --- Quote End ---    If I choose the first one, that mean I need to change all my programs from vhdl to c right? Other choices look like need a complicated/long vhdl code..:cry: Btw thanks for reply Cris72

[Altera_Forum]

I have read thread about sdram controller. They said that,  

 "after generation of the sopc system, a file 'sdram_0.vhd' will generated. Within the file is the entity 'sdram_0' which defines the sdram controller and its avalon_mm IO ports. We can use the entity for accessing the sdram."  What they mean? Is it we can instantiate entity 'sdram_0' in our top level code (main vhdl) without create the c program? Please verify this..thank you:confused:

[Altera_Forum]

The generated .vhd is intended to be used by Quartus compiler in sopc system synthesis. So it exposes an Avalon MM slave interface. Anyway, even if your vhdl module provides an Avalon master port (as I proposed in solution# 2 above), I really don't know if you are allowed to use this vhd code externally to sopc builder. Probably more undisclosed 'library' modules are required. So you probably must integrate your VHDL function into sopc builder by creating a custom component in order to do this. This is not very difficult, but I wouldn't recommend it to a beginner, since it requires some expertise. 

 Regarding solution# 1, i.e. converting to C and executing into Nios, I forgot to mention that HDL implementation is usually much faster than processor code execution. So you must carefully evaluate this tradeoff between simplicity (C) and performance (VHDL)

[Altera_Forum]

Hi Cris72, 

 I choose option 1. Now, I start to study on Nios and c prgrmng. I use Quartus II Web edition version 7.2 with Nios EDS. Is it both of them compatible with Altera monitor program? Thanks for your concern