I've included Altera On-Chip Flash IP Core in my project. The core created a component
component flash_update is
port (
clock : in std_logic := 'X'; -- clk
avmm_csr_addr : in std_logic := 'X'; -- address
avmm_csr_read : in std_logic := 'X'; -- read
avmm_csr_writedata : in std_logic_vector(31 downto 0) := (others => 'X'); -- writedata
avmm_csr_write : in std_logic := 'X'; -- write
avmm_csr_readdata : out std_logic_vector(31 downto 0); -- readdata
avmm_data_addr : in std_logic_vector(18 downto 0) := (others => 'X'); -- address
avmm_data_read : in std_logic := 'X'; -- read
avmm_data_writedata : in std_logic_vector(31 downto 0) := (others => 'X'); -- writedata
avmm_data_write : in std_logic := 'X'; -- write
avmm_data_readdata : out std_logic_vector(31 downto 0); -- readdata
avmm_data_waitrequest : out std_logic; -- waitrequest
avmm_data_readdatavalid : out std_logic; -- readdatavalid
avmm_data_burstcount : in std_logic_vector(3 downto 0) := (others => 'X'); -- burstcount
reset_n : in std_logic := 'X' -- reset_n
);
end component flash_update;
u0 : component flash_update
port map (
clock => CONNECTED_TO_clock, -- clk.clk
avmm_csr_addr => CONNECTED_TO_avmm_csr_addr, -- csr.address
avmm_csr_read => CONNECTED_TO_avmm_csr_read, -- .read
avmm_csr_writedata => CONNECTED_TO_avmm_csr_writedata, -- .writedata
avmm_csr_write => CONNECTED_TO_avmm_csr_write, -- .write
avmm_csr_readdata => CONNECTED_TO_avmm_csr_readdata, -- .readdata
avmm_data_addr => CONNECTED_TO_avmm_data_addr, -- data.address
avmm_data_read => CONNECTED_TO_avmm_data_read, -- .read
avmm_data_writedata => CONNECTED_TO_avmm_data_writedata, -- .writedata
avmm_data_write => CONNECTED_TO_avmm_data_write, -- .write
avmm_data_readdata => CONNECTED_TO_avmm_data_readdata, -- .readdata
avmm_data_waitrequest => CONNECTED_TO_avmm_data_waitrequest, -- .waitrequest
avmm_data_readdatavalid => CONNECTED_TO_avmm_data_readdatavalid, -- .readdatavalid
avmm_data_burstcount => CONNECTED_TO_avmm_data_burstcount, -- .burstcount
reset_n => CONNECTED_TO_reset_n -- nreset.reset_n
);
How should I use it to program CFM on MAX10? I need some example.
Link Copied
I included in my project Flash IP. Compiled and opened qip file. The file imported in my project some files.
flash/flash/synthesis/flash_update.qip
flash/flash/synthesis/flash_update.vhd
flash/flash/synthesis/submodules/altera_onchip_flash_util.v
flash/flash/synthesis/submodules/altera_onchip_flash.v
flash/flash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v
flash/flash/synthesis/submodules/altera_onchip_flash_avmm_csr_controller.v
flash/flash/synthesis/submodules/altera_onchip_flash.sdc
flash/flash/synthesis/submodules/rtl/altera_onchip_flash_block.v
I created my file and included a component from flash_update.vhd. Everything compiles OK. But when I include my component in the top entity I get the following error Error (14740): Configuration mode on atom "bootloader:U_BOOTLOADER|flash_update:U_FLASH_UPDATE|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_block:altera_onchip_flash_block|ufm_block" does not match the project setting. Update and regenerate the Qsys system to match the project setting.
Well...To compile successfully the Qsys and the project should be configured as Single Compressed Imaged. I don't know how it would impact the project. Have to try.
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